HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 595

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Table 23.9 Control Signal Timing
Condition A: V
Condition B: V
Condition C: V
Item
RES
RES
NMI
(
NMI
(
Interrupt pulse width
for recovery from soft-
ware standby mode
(
Crystal oscillator settling
time (reset)
Crystal oscillator settling
time (software standby)
Note: * In the F-ZTAT LH version, V
NMI
NMI
NMI
setup time
hold time
, IRQ
, IRQ
, IRQ
setup time
pulse width
0
0
0
to IRQ
to IRQ
to IRQ
Ta = –20˚C to +75˚C (regular specifications), Ta = –40˚C to +85˚C (wide-range
specifications)
Ta = –20˚C to +75˚C (regular specifications), Ta = –40˚C to +85˚C (wide-range
specifications)
Ta = –20˚C to +75˚C
CC
CC
CC
7
7
2
)
)
, IRQ
= 5.0 V 10%, V
= 4.0 V to 5.5 V, V
= 2.7 V to 5.5 V*, V
6
)
Symbol
t
t
t
t
t
t
t
RESS
RESW
NMIS
NMIH
NMIW
OSC1
OSC2
CC
SS
Min
300
10
300
10
300
20
8
Condition C
= 3.0 V to 5.5 V.
SS
= 0 V, ø = 2.0 MHz to maximum operating frequency,
10 MHz
SS
= 0 V, ø = 2.0 MHz to maximum operating frequency,
= 0 V, ø = 2.0 MHz to maximum operating frequency,
Max
Min
200
10
150
10
200
20
8
Condition B
12 MHz
Max
Min
200
10
150
10
200
20
8
Condition A
16 MHz
Max
Unit
ns
t
ns
ns
ns
ms
ms
cyc
Test
Conditions
Fig. 23.9
Fig. 23.10
Fig. 23.11
Fig. 23.12
563

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