HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 480

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Notes on Use of Boot Mode
1. When the H8/3337YF comes out of reset in boot mode, it measures the low period of the input
2. In boot mode, if any data has been programmed into the flash memory (if all data
3. Interrupts cannot be used while the flash memory is being programmed or erased.
4. The RxD
5. Before branching to the user program (at address H'F7E0 in the RAM area), the H8/3337YF
6. Boot mode can be entered by starting from a reset after 12 V is applied to the MD
448
at the SCI’s RxD
100 states for the H8/3337YF to get ready to measure the low period of the RxD
H'FF), all flash memory blocks are erased. Boot mode is for use when user programming mode
is unavailable, e.g. the first time on-board programming is performed, or if the update program
activated in user programming mode is accidentally erased.
terminates transmit and receive operations by the on-chip SCI (by clearing the RE and TE bits
of the serial control register to 0 in channel 1), but the auto-aligned bit rate remains set in bit
rate register BRR. The transmit data output pin (TxD
bits P8
to 1).
At this time, the values of general registers in the CPU are undetermined. Thus these registers
should be initialized immediately after branching to the user program. Especially in the case of
the stack pointer, which is used implicitly in subroutine calls, the stack area used by the user
program should be specified.
There are no other changes to the initialized values of other registers.
pins according to the mode setting conditions listed in table 20.7. Note the following points
when turning the V
When reset is released (at the rise from low to high), the H8/3337YF checks for 12-V input at
the MD
status internally. The threshold point of this voltage-level check is in the range from
approximately V
insufficient for programming or erasure (11.4 V to 12.6 V). When the boot program is
executed, the V
12.6 V before the branch to the RAM area occurs. See figure 20.20.
Make sure that the programming voltage V
boot mode (at the reset release timing) and does not go outside the range of 12 V 0.6 V while
in boot mode. Boot mode will not be executed correctly if these limits are exceeded. In
4
1
DDR of the port 8 data direction register and P8
and FV
1
and TxD
PP
PP
CC
1
power supply must therefore be stabilized within the range of 11.4 V to
pin. The reset should end with RxD
pins. If it detects that these pins are programmed for boot mode, it saves that
PP
1
+ 2 V to 11.4 V, so boot mode will be entered even if the applied voltage is
pins should be pulled up on-board.
power on.
PP
does not exceed 12.6 V during the transition to
1
) is in the high output state (in port 8, the
1
high. After the reset ends, it takes about
4
DR of the port 8 data register are set
1
*3
input.
1
and FV
is not
PP