M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 105

• Manufacturer Part Number: M30835FJGP#U5
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
8.4 Clock Output Function
8.5 Power Consumption Control
e
E
3
. v
J
Table 8.4 CLK
Table 8.5 BLCK/CLK
2
0
- : Can be set to either "0" or "1"
NOTES:
- : Can be set to either "0" or "1"
NOTES:
8.3.3 f
The CLK
In memory expansion and microprocessor modes, a clock having the same frequency as the CPU clock
can be output from the BCLK pin as BCLK.
Table 8.4 lists CLK
expansion and microprocessor modes.
Normal operation mode, wait mode and stop mode are provided as the power consumption control.
All mode states, except wait mode and stop mode, are called normal operation mode in this document.
Figure 8.14 shows a block diagram of status transition in wait mode and stop mode. Figure 8.15 shows a
block diagram of status transition in all modes.
1
C
9
PM1 Register
PM0 Register
3 .
B
f
available when the sub clock is running.
8 /
PM15
C32
1. Rewrite the PM0 register after the PRC1 bit in the PRCR register is set to "1" (write enable)
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable)
1. Rewrite the PM0 and PM1 register after the PRC1 bit in the PRCR register is set to "1" (write enable)
2. Rewrite the CM0 register after the PRC0 bit in the PRCR register is set to "1" (write enable)
3. When the PM07 bit is set to "0" (selected in the CM01 to CM00 bits) or the PM15 to PM14 bits are set
4. M32C/83T cannot be used in memory expansion mode and microprocessor mode.
0
1
3
00
0
0
to "01
3
J
G
PM07
4
a
2
is the sub clock divided by 32. f
, 10
0 -
o r
n
1
1
1
C32
OUT
3 .
1
u
3
, 1
p
2
2
1
" (P5
, 11
(
2
pin outputs f
M
0
OUT
PM14
(1)
0
3
(1)
2
6
2
1
,
3
C
/BCLK), set the CM01 to CM00 bits to "00
Pin in Single-Chip Mode
OUT
8 /
Page 80
, 3
OUT
pin function in single-chip mode. Table 8.5 lists CLK
CM01
M
C
CM0 Register
PM0 Register
3
0
0
1
1
Pin in Memory Expansion Mode and Microprocessor Mode
, f
2
C
8
f o
8 /
or f
PM07
4
3
8
0
1
1
1
1
) T
8
32
.
CM00
C32
(1)
(2)
0
1
0
1
is used for as a count source for the timers A and B. f
0
0
0
1
1
0
CM01
CLK
Outputs fc
P5
Outputs f
Outputs f
(3)
(3)
CM0 Register
3
OUT
I/O port
Pin Function
8
32
2
" (I/O port P5
0
0
1
0
1
0
CM00
(3)
(3)
(2)
Outputs ALE
Outputs BCLK
Outputs "L" (not P5
Outputs fc
Outputs f
Outputs f
3
)
OUT
CLK
OUT
pin functions in memory
8. Clock Generation Circuit
8
32
Pin Function
(4)
3
)
C32
is