M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 279

• Manufacturer Part Number: M30835FJGP#U5
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
3
. v
J
2
0
Figure 21.6 G0BCR1 and G1BCR1 Registers
1
9
C
3 .
B
8 /
0
1
Group i Base Timer Control Register 1 (i=0,1)
3
0
b7
3
J
G
NOTES:
4
a
b6
0 -
n
o r
1. In group 0, the base timer is reset by synchronizing with the group 1 base timer reset. In group 1,
2. The base timer is reset two f
3. In group 0, the base timer is reset when "L" is applied to the INT0 pin. In group 1, the base timer is
4. When the CAS bit is set to "1" (32-bit time measurement, waveform generation function), set the
5. When starting the group 0 or 1 base timer separately, set the BTS bit to "1" after the BTkS bit (k=0 to
6. When starting the base timers in multiple groups simultaneously, use the BTSR register. Set the
7. In two-phase pulse signal processing mode, the base timer is not reset, even when the RST1 bit is
3 .
1
u
b5
, 1
3
the base timer is reset by synchronizing with the group 0 base timer reset.
register. (See Figure 21.13 for details on the GiPO0 register.) When the RST1 bit is set to "1", the
value of the GiPOj register (j=1 to7) for the waveform generation function and communication
function must be set to a smaller value than that of the GiPO0 register.
reset when "L" is applied to the INT1 pin.
G0BCR1 register to "81
1) in the BTSR register is set to "0".
BTS bit to "0".
set to "1", if the counter is decremented two clock cycles after the base timer matches the value set
in the GiPO0 register
p
1
2
(
b4
M
0
0
3
b3
0
6
2
C
b2
Page 254
8 /
, 3
b1
M
b0
3
2
Symbol
C
f o
RST0
RST1
RST2
Bit
BTS
UD0
UD1
CAS
(b3)
16
8 /
Symbol
G0BCR1, G1BCR1
4
" and the G1BCR1 register to "1000 0XX0
3
8
) T
8
BTi
Base Timer Reset
Cause Select Bit 0
Base Timer Reset
Cause Select Bit 1
Base Timer Reset
Cause Select Bit 2
Base Timer
Start Bit
Counter Increment/
Decrement Control Bit
Groups 0 and 1
Cascaded Connection
Function Select Bit
Reserved Bit
clock cycles after the base timer matches the value set in the GiPO0
Bit Name
(5, 6)
Address
00E3
b6
0: The base timer is not reset by
1: The base timer is reset by matching
0: The base timer is not reset by
1: The base timer is reset by applying
Set to "0"
0: Base timer is reset
1: Base timer starts counting
0: 16-bit time measurement or
1: 32-bit time measurement or
0: The base timer is not reset by
1: The base timer is reset by synchronizing
0
0
1
1
b5
0
1
0
1
applying "L" to the INTi pin
"L" to the INTi pin
matching with the GiPO0 register
with the GiPO0 register
waveform generation function
waveform generation function
synchronizing with the base timer reset
with the base timer reset
16
: Counter increment mode
: Counter increment/decrement mode
: Two-phase pulse signal processing
: Do not set to this value
mode
, 0123
(7)
16
2
".
Function
(3)
After Reset
00
16
(2)
(1)
(4)
RW
RW
RW
RW
RW
RW
RW
RW
RW
21. Intelligent I/O