M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 145

• Manufacturer Part Number: M30835FJGP#U5
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
e
E
. v
3
J
Figure 12.5 DMA0 to DMA3 Registers, DSA0 to DSA3 Registers and DRA0 to DRA3 Registers
0
2
1
9
C
3 .
B
8 /
0
1
0
3
3
J
G
4
a
0 -
n
DMAi Memory Address Register
DMAi SFR Address Register
DMAi Memory Address Reload Register
o r
b23
b23
b23
3 .
1
NOTES:
NOTES:
NOTES:
u
, 1
3
p
1
1. When the RWk bit (k=0 to 3) in the DMDj register (j=0, 1)is set to "0" (fixed address to memory), a
2. Use the LDC instruction to set the DMA0 and DMA1 registers.
3. To set the DMA2 register, set the B flag in the FLG register to "1" (register bank 1) and set A0
4. To set the DMA3 register, set the B flag to "1" and set A1 register. Use the MOV instruction to set the
1. When the RWk bit (k=0 to 3) in the DMDj register (j=0, 1) is set to "0" (fixed address to memory), a
2. Use the LDC instruction to set the DSA0 and DSA1 registers.
3. To set the DSA2 register, set the B flag in the FLG register to "1" (register bank 1) and the set the SB
4. To set the DSA3 register, set the B flag to "1" and set the FB register. Use the LDC instruction to set
1. Use the LDC instruction to set the these registers.
2. To set the DRA2 register, set the SVP register.
3. To set the DRA3 register, set the VCT register.
2
(
0
M
destination address is selected. When the RWk bit is set to "1" (memory to fixed address), a source
address is selected.
register. Use the MOV instruction to set the A0 register.
1 register.
source address is selected. When the RWk bit is set to "1" (memory to fixed address), a destination
address is selected.
register. Use the LDC instruction to set the SB register.
the FB register.
0
3
6
b16
b16
b16
2
C
b15
b15
b15
Page 120
8 /
, 3
M
3
2
C
b8 b7
b8 b7
b8 b7
f o
8 /
4
8
3
Set a source memory address or destination
memory address
Set a source fixed address or destination fixed
address
Set a source memory address or destination
memory address
8
) T
(1)
b0
b0
b0
(i=0 to 3)
Symbol
DMA0
DMA1
DMA2(bank1;A0)
DMA3(bank1;A1)
Symbol
DSA0
DSA1
DSA2(bank1;SB)
DSA3(bank1;FB)
Symbol
DRA0
DRA1
DRA2(SVP)
DRA3(VCT)
(1)
Function
Function
Function
(2)
(2)
(i=0 to 3)
(2)
(2)
(2)
(3)
(4)
(3)
(3)
(4)
(1) (i=0 to 3)
Address
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
Address
Address
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
(CPU Internal Register)
000000
000000
000000
(16-Mbyte space)
(16-Mbyte space)
(16-Mbyte space)
Setting Range
Setting Range
Setting Range
16
16
16
to FFFFFF
to FFFFFF
to FFFFFF
After Reset
XXXXXX
XXXXXX
000000
000000
After Reset
XXXXXX
XXXXXX
000000
000000
After Reset
XXXXXX
XXXXXX
XXXXXX
XXXXXX
16
16
16
16
16
16
16
RW
RW
RW
RW
RW
RW
16
16
16
16
16
16
16
16
12. DMAC