M30835FJGP#U5 Renesas Electronics America, M30835FJGP#U5 Datasheet - Page 177

• Manufacturer Part Number: M30835FJGP#U5
• Description: IC M32C/83 MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30835FJGP#U5

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 121
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R
R
M
14.2 Timer B
e
E
3
. v
J
Figure 14.16 Timer B Block Diagram
Figure 14.17 TB0 to TB5 Registers
2
0
Figure 14.16 shows a block diagram of the timer B. Figures 14.17 to 14.19 show registers associated with
the timer B. The timer B supports the following three modes. The TMOD1 to TMOD0 bits in the TBiMR
register (i=0 to 5) determine which mode is used.
C
1
9
3 .
B
8 /
• Timer mode : The timer counts an internal count source.
• Event counter mode : The timer counts pulses from an external source or overflow and underflow of
• Pulse period/pulse width measurement mode : The timer measures pulse period or pulse width of an
Table 14.18 lists TBi
0
1
another timer.
external signal.
3
0
TBi
3
J
G
TBj Overflow
4
a
IN
o r
0 -
n
b15
Timer Bi Register
3 .
1
u
i=0 to 5
NOTES:
TCK1 to TCK0, TMOD1 to TMOD0 : Bits in TAiMR register
TBiS : Bits in the TABSR and the TBSR register
, 1
3
p
1. The CNT3 to CNT0 bits in the TCSPR register select no
2. The timer counter overflows or underflows.
3. j=i-1, except j=2 when i=0 j=5 when i=3
1
(
2
division (n=0) or divide-by-2n (n=1 to 15).
M
NOTES:
Select Clock Source
0
f
Polarity Switching
and Edge Pulse
f
f
f
2n
0
1
8
c32
3
1. Use 16-bit data for read and write operations.
2. The TBi register counts the number of external input pulses or the number of times another
6
2
(1)
b8 b7
C
timer counter overflows and underflows.
10
8 /
01
11
Page 152
00
, 3
(Note 2, 3)
TCK1 to
TCK0
IN
M
pin settings.
3
2
C
f o
b0
8 /
00: Timer
01: Pulse Period and Pulse
(1)
1
0
4
Timer Mode
Event Counter
Mode
Pulse Period/Pulse
Width Measurement
Mode
3
8
) T
TCK1
(i=0 to 5)
Symbol
8
Width Measurement
TB0 to TB2
TB3 to TB5
Mode
01:
Event Counter
Address
0351
0311
If setting value is n, a count source
is divided by n+1
If setting value is n, a count source
is divided by n+1
A count source is incremented
between one valid edge and
another valid edge of TBi
16
16
- 0310
- 0350
TMOD1 to TMOD0
16
16
, 0353
, 0313
Function
Counter Reset Circuit
16
16
(2)
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
- 0312
- 0352
TBi
16
16
TBiS
IN
, 0315
, 0355
pulse
0351
0353
0355
0311
0313
0315
16
16
High-order Bits of Data Bus
Low-order Bits of Data Bus
16
16
16
16
16
16
Address
- 0314
- 0354
Reload Register
0350
0352
0354
0310
0312
0314
0000
0000
8 low-order
bits
16
16
Setting Range
Counter
16
16
16
16
16
16
16
16
After Reset
Indeterminate
Indeterminate
to FFFF
to FFFF
Timer B2
Timer B0
Timer B1
Timer B5
Timer B3
Timer B4
TBj
14. Timer (Timer B)
16
16
RW
RW
RW
RO
8 high-
order
bits