UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 279
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UPD70F3736GK-GAK-AX
Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3736GK-GAK-AX.pdf
(830 pages)
Specifications of UPD70F3736GK-GAK-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(1) 16-bit counter
(2) CCR0 buffer register
(3) CCR1 buffer register
(4) CCR2 buffer register
(5) CCR3 buffer register
(6) Edge detector
(7) Output controller
(8) Selector
This 16-bit counter can count internal clocks or external events.
The count value of this counter can be read by using the TQ0CNT register.
When the TQ0CTL0.TQ0CE bit = 0, the value of the 16-bit counter is FFFFH. If the TQ0CNT register is read at
this time, 0000H is read.
Reset sets the TQ0CE bit to 0. Therefore, the 16-bit counter is set to FFFFH.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQ0CCR0 register is used as a compare register, the value written to the TQ0CCR0 register is
transferred to the CCR0 buffer register. When the count value of the 16-bit counter matches the value of the
CCR0 buffer register, a compare match interrupt request signal (INTTQ0CC0) is generated.
The CCR0 buffer register cannot be read or written directly.
The CCR0 buffer register is cleared to 0000H after reset, as the TQ0CCR0 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQ0CCR1 register is used as a compare register, the value written to the TQ0CCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the
CCR1 buffer register, a compare match interrupt request signal (INTTQ0CC1) is generated.
The CCR1 buffer register cannot be read or written directly.
The CCR1 buffer register is cleared to 0000H after reset, as the TQ0CCR1 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQ0CCR2 register is used as a compare register, the value written to the TQ0CCR2 register is
transferred to the CCR2 buffer register. When the count value of the 16-bit counter matches the value of the
CCR2 buffer register, a compare match interrupt request signal (INTTQ0CC2) is generated.
The CCR2 buffer register cannot be read or written directly.
The CCR2 buffer register is cleared to 0000H after reset, as the TQ0CCR2 register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQ0CCR3 register is used as a compare register, the value written to the TQ0CCR3 register is
transferred to the CCR3 buffer register. When the count value of the 16-bit counter matches the value of the
CCR3 buffer register, a compare match interrupt request signal (INTTQ0CC3) is generated.
The CCR3 buffer register cannot be read or written directly.
The CCR3 buffer register is cleared to 0000H after reset, as the TQ0CCR3 register is cleared to 0000H.
This circuit detects the valid edges input to the TIQ00 and TIQ03 pins. No edge, rising edge, falling edge, or
both the rising and falling edges can be selected as the valid edge by using the TQ0IOC1 and TQ0IOC2
registers.
This circuit controls the output of the TOQ00 to TOQ03 pins. The output controller is controlled by the
TQ0IOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event
can be selected as the count clock.
CHAPTER 8 16-BIT TIMER/EVENT COUNTER Q (TMQ)
Preliminary User’s Manual U18952EJ1V0UD
279
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