UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 391
UPD70F3736GK-GAK-AX
Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3736GK-GAK-AX.pdf
(830 pages)
Specifications of UPD70F3736GK-GAK-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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10.4 Operation
10.4.1 Operation as watch timer
using time intervals of 0.25 or 0.5 seconds with the subclock (32.768 kHz) or main clock.
cleared to 0, the 11-bit prescaler and 5-bit counter are cleared and the count operation stops.
operating at the same time as the interval timer. At this time, an error of up to 15.6 ms may occur for the watch timer,
but the interval timer is not affected.
BGCS00 bits, the 8-bit comparison value using the PRSCM0 register, and the count clock frequency (f
watch timer to 32.768 kHz.
PRSCM0 register.
The watch timer generates an interrupt request signal (INTWT) at fixed time intervals. The watch timer operates
The count operation starts when the WTM.WTM1 and WTM.WTM0 bits are set to 11. When the WTM0 bit is
The time of the watch timer can be adjusted by clearing the WTM1 bit to 0 and then the 5-bit counter when
If the main clock is used as the count clock of the watch timer, set the count clock using the PRSM0.BGCS01 and
When the PRSM0.BGCE0 bit is set (1), f
f
To set f
<1> Set N = f
<2> When the value resulting from rounding up the first decimal place of N is even, set N before the roundup as
<3> Repeat <2> until N is odd or m = 3.
<4> Set the value resulting from rounding up the first decimal place of N to the PRSCM0 register and m to the
Example: When f
Remark m: Division value (set value of BGCS01 and BGCS00 bits) = 0 to 3
BRG
f
BRG
can be calculated by the following expression.
N/2 and m as m + 1.
BGCS01 and BGCS00 bits.
= f
BRG
X
N: Set value of PRSCM0 register = 1 to 256
f
/(2
<1> N = 4,000,000/65,536 = 61.03…, m = 0
<2>, <3> Because N (round up the first decimal place) is odd, N = 61, m = 0.
<4> Set value of PRSCM0 register: 3DH (61), set value of BGCS01 and BGCS00 bits: 00
At this time, the actual f
f
X
BRG
: Main clock oscillation frequency
to 32.768 kHz, perform the following calculation and set the BGCS01 and BGCS00 bits and the
X
However, N = 256 when PRSCM0 register is set to 00H.
m+1
/65,536. Set m = 0.
= f
= 32.787 kHz
× N)
X
X
/(2
= 4.00 MHz
m+1
× N) = 4,000,000/(2 × 61)
BRG
CHAPTER 10 WATCH TIMER FUNCTIONS
Preliminary User’s Manual U18952EJ1V0UD
frequency is as follows.
BRG
is supplied to the watch timer.
BRG
) of the
391
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