UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 446

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UPD70F3736GK-GAK-AX

Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3736GK-GAK-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.4.3 Cautions
446
Observe the following cautions when using the D/A converter of the V850ES/JF3-L.
(1) Do not change the set value of the DA0CS0 register while the trigger signal is being issued in the real-time
(2) Before changing the operation mode, be sure to clear the DA0M.DA0CE0 bit to 0.
(3) Make sure that AV
(4) Apply power to AV
(5) No current can be output from the ANO0 pin because the output impedance of the D/A converter is high.
(6) Because the D/A converter stops operation in the STOP mode, the ANO0 pin goes into a high-impedance state,
output mode.
When connecting a resistor of 2 MΩ or less, insert a JFET input operational amplifier between the resistor and
the ANO0 pin.
and the power consumption can be reduced.
However, the pin status is kept in the IDLE1, IDLE2, or subclock operation mode. To reduce the power
consumption, therefore, clear the DA0M.DA0CE0 bit to 0.
REF0
REF1
= V
at the same timing as AV
DD
Figure 14-2. External Pin Connection Example
= AV
AV
AV
ANO0
REF1
AV
Preliminary User’s Manual U18952EJ1V0UD
REF0
REF1
CHAPTER 14 D/A CONVERTER
SS
= 2.7 to 3.6 V. If this range is exceeded, the operation is not guaranteed.
0.1 F
0.1 F
REF0
+
μ
μ
.
JFET input
operational amplifier
10 F
10 F
μ
μ
Output
V
DD

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