AT90LS2333-4AI Atmel, AT90LS2333-4AI Datasheet - Page 42

• Manufacturer Part Number: AT90LS2333-4AI
• Description: IC MCU 2K 4MHZ A/D LV IT 32TQFP
• Manufacturer: Atmel
• Series: AVR® 90LSr

Specifications of AT90LS2333-4AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Data Modes
There are four combinations of SCK phase and polarity with respect to serial data, which are determined by control bits
CPHA and CPOL. The SPI data transfer formats are shown in Figure 38 and Figure 39.
Figure 38. SPI Transfer Format with CPHA = 0 and DORD = 0
Figure 39. SPI Transfer Format with CPHA = 1 and DORD = 0
SPI Control Register - SPCR
•
This bit causes the SPI interrupt to be executed if SPIF bit in the SPSR register is set and the global interrupts are enabled.
•
When the SPE bit is set (one), the SPI is enabled. This bit must be set to enable any SPI operations.
•
When the DORD bit is set (one), the LSB of the data word is transmitted first.
When the DORD bit is cleared (zero), the MSB of the data word is transmitted first.
•
This bit selects Master SPI mode when set (one), and Slave SPI mode when cleared (zero). If SS is configured as an input
and is driven low while MSTR is set, MSTR will be cleared, and SPIF in SPSR will become set. The user will then have to
set MSTR to re-enable SPI master mode.
•
When this bit is set (one), SCK is high when idle. When CPOL is cleared (zero), SCK is low when idle. Refer to Figure 38
and Figure 39 for additional information.
•
Refer to Figure 38 or Figure 39 for the functionality of this bit.
42
Bit
$0D ($2D)
Read/Write
Initial value
Bit 7 - SPIE: SPI Interrupt Enable
Bit 6 - SPE: SPI Enable
Bit 5 - DORD: Data ORDer
Bit 4 - MSTR: Master/Slave Select
Bit 3 - CPOL: Clock POLarity
Bit 2 - CPHA: Clock PHAse
AT90S/LS2333 and AT90S/LS4433
SPIE
R/W
7
0
SPE
R/W
6
0
DORD
R/W
5
0
MSTR
R/W
4
0
CPOL
R/W
3
0
CPHA
R/W
2
0
SPR1
R/W
1
0
SPR0
R/W
0
0
SPCR