PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 122

IC MCU FLASH 8KX16 44QFN

PIC18F4431-E/ML

Manufacturer Part Number
PIC18F4431-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2331/2431/4331/4431
11.4
PORTD is an 8-bit wide, bidirectional port. The
corresponding Data Direction register is TRISD.
Setting a TRISD bit (= 1) will make the corresponding
PORTD pin an input (i.e., put the corresponding output
driver in a high-impedance mode). Clearing a TRISD
bit (= 0) will make the corresponding PORTD pin an
output (i.e., put the contents of the output latch on the
selected pin).
The Data Latch register (LATD) is also memory
mapped. Read-modify-write operations on the LATD
register read and write the latched output value for
PORTD.
All pins on PORTD are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output.
DS39616D-page 122
Note:
Note:
PORTD, TRISD and LATD
Registers
PORTD is only available on PIC18F4331/
4431 devices.
On a Power-on Reset, these pins are
configured as digital inputs.
PORTD includes PWM<7:6> complementary fourth
channel PWM outputs. PWM4 is the complementary
output of PWM5 (the third channel), which is multi-
plexed with the RB5 pin. This output can be used as the
alternate output using the PWM4MX Configuration bit
in CONFIG3H when the Single-Supply Programming
pin (PGM) is used on RB5.
RD1, RD2 and RD3 can be used as the alternate out-
put for SDO, SDI/SDA and SCK/SCL using the SSPMX
Configuration bit in CONFIG3H.
RD4 an be used as the alternate output for FLTA using
the FLTAMX Configuration bit in CONFIG3H.
EXAMPLE 11-4:
CLRF
CLRF
MOVLW
MOVWF
PORTD
LATD
0xCF
TRISD
; Initialize PORTD by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RD<3:0> as inputs
; RD<5:4> as outputs
; RD<7:6> as inputs
INITIALIZING PORTD
 2010 Microchip Technology Inc.

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