PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 209

• Manufacturer Part Number: PIC18F4431-E/ML
• Description: IC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 19-1:
 2010 Microchip Technology Inc.
SDO
SCK
SDI
SS
Peripheral OE
Read
SS Control
TRISC<3>
Select
Edge
Enable
bit 0
Select
Edge
SSPBUF Reg
SSP BLOCK DIAGRAM
(SPI MODE)
SSPSR Reg
Clock Select
SSPM<3:0>
4
2
Prescaler
Write
4, 16, 64
Clock
TMR2 Output
Shift
Data Bus
Internal
2
PIC18F2331/2431/4331/4431
T
CY
To enable the serial port, SSP Enable bit, SSPEN
(SSPCON<5>), must be set. To reset or reconfigure
SPI mode, clear bit SSPEN, reinitialize the SSPCON
register and then set bit SSPEN. This configures the
SDI, SDO, SCK and SS pins as serial port pins. For the
pins to behave as the serial port function, they must
have their data direction bits (in the TRISC register)
appropriately programmed. That is:
• Serial Data Out (SDO) – RC7/RX/DT/SDO or
• SDI must have TRISC<4> or TRISD<2> set
• SDO must have TRISC<7> or TRISD<1> cleared
• SCK (Master mode) must have TRISC<5> or
• SCK (Slave mode) must have TRISC<5> or
• SS must have TRISA<6> set
RD1/SDO
TRISD<3> cleared
TRISD<3> set
Note 1: When the SPI is in Slave mode, with
2: If the SPI is used in Slave mode with
3: When the SPI is in Slave mode with SS pin
the
(SSPCON<3:0> = 0100),
module will reset if the SS pin is set to
V
CKE = 1, then the SS pin control must be
enabled.
control enabled (SSPCON<3:0> = 0100),
the state of the SS pin can affect the state
read back from the TRISC<6> bit. The
peripheral OE signal from the SSP module
into PORTC controls the state that is read
back from the TRISC<6> bit (see
Section 11.3 “PORTC, TRISC and LATC
Registers”
Read-Modify-Write instructions, such as
BSF, are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<6> bit to be set, thus disabling the
SDO output.
DD
.
SS
for information on PORTC). If
pin
control
DS39616D-page 209
the
enabled,
SPI