PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 91

IC MCU FLASH 8KX16 44QFN

PIC18F4431-E/ML

Manufacturer Part Number
PIC18F4431-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.5
The programming block size is 4 words or 8 bytes.
Word or byte programming is not supported.
Table writes are used internally to load the holding
registers needed to program the Flash memory. There
are 8 holding registers used by the table writes for
programming.
Since the Table Latch (TABLAT) is only a single byte,
the TBLWT instruction has to be executed 8 times for
each programming operation. All of the table write
operations will essentially be short writes, because only
the holding registers are written. At the end of updating
8 registers, the EECON1 register must be written to, to
start the programming operation with a long write.
FIGURE 8-5:
 2010 Microchip Technology Inc.
TBLPTR = xxxxx0
Writing to Flash Program Memory
Holding Register
8
TABLE WRITES TO FLASH PROGRAM MEMORY
TBLPTR = xxxxx1
Holding Register
PIC18F2331/2431/4331/4431
8
Program Memory
Write Register
TBLPTR = xxxxx2
TABLAT
The long write is necessary for programming the
internal Flash. Instruction execution is halted while in a
long write cycle. The long write will be terminated by
the internal programming timer.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
Note:
Holding Register
8
operation.
The default value of the holding registers
on device Resets and after write operations
is FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may
be modified, provided that the modification
does not attempt to change any bit from a
‘0’ to a ‘1’. When modifying individual
bytes, it is not necessary to load all 64 hold-
ing registers before executing a write
TBLPTR = xxxxx7
Holding Register
DS39616D-page 91
8

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