PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 254

IC MCU FLASH 8KX16 44QFN

PIC18F4431-E/ML

Manufacturer Part Number
PIC18F4431-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2331/2431/4331/4431
21.9.1
The ADRESH:ADRESL register pair is the location
where the 10-bit A/D result is loaded at the completion
of the A/D conversion. This register pair is 16 bits wide.
The A/D module gives the flexibility to left or right justify
the 10-bit result in the 16-bit result register. The A/D
FIGURE 21-5:
EQUATION 21-3:
DS39616D-page 254
Sequential Mode:
T = (T
Simultaneous Mode:
T = T
ACQ
ACQ
A/D RESULT REGISTER
+ (T
)
A
+ (T
7
CON
0000 00
CON
)
ADRESH
A
+ (T
A/D RESULT JUSTIFICATION
CONVERSION TIME FOR MULTI-CHANNEL MODES
)
A
+ [(T
CON
Right Justified
2 1 0 7
ADFM = 1
ACQ
)
B
+ T
10-Bit Result
)
B
ACQ
– 12 T
ADRESL
+ (T
AD
CON
] + (T
)
C
0
CON
+ (T
10-Bit Result
)
CON
B
+ [(T
)
D
ACQ
)
Format Select bit (ADFM) controls this justification.
Figure 21-5
justification. The extra bits are loaded with ‘0’s. When
an A/D result will not overwrite these locations (A/D
disable), these registers may be used as two general
purpose 8-bit registers.
C
– 12 T
7
AD
ADRESH
10-Bit Result
] + (T
shows the operation of the A/D result
CON
Left Justified
ADFM = 0
)
C
0 7 6 5
+ [(T
 2010 Microchip Technology Inc.
ADRESL
ACQ
0000 00
)
D
– 12 T
0
AD
] + (T
CON
)
D

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