PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 181

• Manufacturer Part Number: PIC18F4431-E/ML
• Description: IC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 18-1
can be generated with the PWM time base and the
prescaler.
(F
the table. The PWM module must be capable of gener-
ating PWM signals at the line frequency (50 Hz or
60 Hz) for certain power control applications.
TABLE 18-1:
FIGURE 18-5:
 2010 Microchip Technology Inc.
Prescale
Minimum PWM Frequencies vs. Prescaler Value
PTMR_INT_REQ
Note 1: PWM Time Base Period register, PTPER, is loaded with the value, FFFh, for this example.
PTMR_INT_REQ
A: PRESCALER = 1:1
B: PRESCALER = 1:4
CYC
1:16
1:64
1:1
1:4
= 10 MHz) and PTPER = 0xFFF is assumed in
for F
PTIF bit
PTIF bit
F
PTMR
PTMR
OSC
shows the minimum PWM frequencies that
An
CYC
/4
PWM Frequency
Edge-Aligned
Q1
Qc
= 10 MIPS (PTPER = 0FFFh)
operating
MINIMUM PWM FREQUENCY
2441 Hz
610 Hz
153 Hz
38 Hz
Q2
Qc
PWM TIME BASE INTERRUPT TIMING, FREE-RUNNING MODE
FFEh
FFEh
Q3
Qc
frequency
Q4
Qc
PWM Frequency
Center-Aligned
Q1
Qc
1221 Hz
305 Hz
76 Hz
19 Hz
1
1
Q2
Qc
of
FFFh
FFFh
PIC18F2331/2431/4331/4431
Q3
Qc
40 MHz
Q4
Qc
Q1
Qc
Q4
Q2
Qc
Q4
18.3.5
The match output of PTMR can optionally be
postscaled through a 4-bit postscaler (which gives a
1:1 to 1:16 scaling inclusive) to generate an interrupt.
The postscaler counter is cleared when any of the
following occurs:
• Write to the PTMR register
• Write to the PTCON register
• Any device Reset
The PTMR register is not cleared when PTCON is
written.
18.4
The PWM timer can generate interrupts based on the
modes of operation selected by the PTMOD<1:0> bits
and the postscaler bits (PTOPS<3:0>).
18.4.1
When the PWM time base is in the Free-Running mode
(PTMOD<1:0> = 00), an interrupt event is generated
each time a match with the PTPER register occurs. The
PTMR register is reset to zero in the following clock edge.
Using a postscaler selection other than 1:1 will reduce
the frequency of interrupt events.
000h
000h
Q3
Qc
Q4
Qc
PWM Time Base Interrupts
PWM TIME BASE POSTSCALER
INTERRUPTS IN FREE-RUNNING
MODE
Q1
Qc
Q2
Qc
001h
001h
Q3
Qc
Q4
Qc
Q1
Qc
DS39616D-page 181
Q2
Qc
002h
002h
Q3
Qc
Q4
Qc