PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 320

• Manufacturer Part Number: PIC18F4431-E/ML
• Description: IC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F2331/2431/4331/4431
SUBWFB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
DS39616D-page 320
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
(f) – (W) – (C) dest
Subtract W from f with Borrow
[ label ]
0  f  255
d  [0,1]
a  [0,1]
N, OV, C, DC, Z
Subtract W and the Carry flag (borrow)
from register, ‘f’ (2’s complement
method). If ‘d’ is ‘0’, the result is stored in
W. If ‘d’ is ‘1’, the result is stored back in
register, ‘f’. If ‘a’ is ‘0’, the Access Bank
will be selected, overriding the BSR
value. If ‘a’ is ‘1’, then the bank will be
selected as per the BSR value.
1
1
SUBWFB
SUBWFB REG, 0, 0
SUBWFB
Read
0101
Q2
0x19
0x0D
0x01
0x0C
0x0D
0x01
0x00
0x00
0x1B
0x1A
0x00
0x1B
0x00
0x01
0x01
0x00
0x03
0x0E
0x01
0xF5
0x0E
0x00
0x00
0x01
SUBWFB
10da
REG, 1, 0
REG, 1, 0
(0001 1001)
(0000 1101)
(0000 1011)
(0000 1101)
; result is positive
(0001 1011)
(0001 1010)
(0001 1011)
; result is zero
(0000 0011)
(0000 1101)
(1111 0100)
; [2’s comp]
(0000 1101)
; result is negative
Process
Data
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ‘f’
Swap f
[ label ]
0  f  255
d  [0,1]
a  [0,1]
(f<3:0>)  dest<7:4>,
(f<7:4>)  dest<3:0>
None
The upper and lower nibbles of register,
‘f’, are exchanged. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result is
placed in register, ‘f’. If ‘a’ is ‘0’, the
Access Bank will be selected, overrid-
ing the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the BSR
value.
1
1
SWAPF
Read
0011
Q2
0x53
0x35
 2010 Microchip Technology Inc.
SWAPF f [,d [,a]]
REG
10da
Process
Data
Q3
ffff
destination
Write to
Q4
ffff