PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 191

• Manufacturer Part Number: PIC18F4431-E/ML
• Description: IC MCU FLASH 8KX16 44QFN
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

18.7
In power inverter applications, where the PWMs are
used in Complementary mode to control the upper and
lower switches of a half-bridge, a dead-time insertion is
highly recommended. The dead-time insertion keeps
both outputs in inactive state for a brief time. This
avoids any overlap in the switching during the state
change of the power devices due to T
characteristics.
Because the power output devices cannot switch
instantaneously, some amount of time must be pro-
vided between the turn-off event of one PWM output in
a complementary pair and the turn-on event of the
other transistor. The PWM module allows dead time to
be programmed. The following sections explain the
dead-time block in detail.
FIGURE 18-17:
FIGURE 18-18:
 2010 Microchip Technology Inc.
Compare Input
Duty Cycle
Dead-Time Generators
Dead Time
Dead Time
Select Bits
Prescale
F
OSC
DEAD-TIME CONTROL UNIT BLOCK DIAGRAM FOR ONE PWM OUTPUT PAIR
DEAD-TIME INSERTION FOR COMPLEMENTARY PWM
and Prescaler
Clock Control
Compare
Output
PWM1
PWM0
PDC1
ON
and T
PIC18F2331/2431/4331/4431
Dead-Time Register
6-Bit Down Counter
Zero Compare
OFF
t d
18.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter used to produce the
dead-time insertion. As shown in
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output. The
dead time is loaded into the timer on the detected PWM
edge event. Depending on whether the edge is rising or
falling, one of the transitions on the complementary
outputs is delayed until the timer counts down to zero.
A timing diagram, indicating the dead-time insertion for
one pair of PWM outputs, is shown in
t d
DEAD-TIME INSERTION
Odd PWM Signal to
Output Control Block
Even PWM Signal to
Output Control Block
Figure
DS39616D-page 191
Figure
18-17, each
18-18.