PIC18F4431-E/ML Microchip Technology, PIC18F4431-E/ML Datasheet - Page 176

IC MCU FLASH 8KX16 44QFN

PIC18F4431-E/ML

Manufacturer Part Number
PIC18F4431-E/ML
Description
IC MCU FLASH 8KX16 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2331/2431/4331/4431
18.1
The operation of the PWM module is controlled by a
total of 22 registers. Eight of these are used to
configure the features of the module:
• PWM Timer Control Register 0 (PTCON0)
• PWM Timer Control Register 1 (PTCON1)
• PWM Control Register 0 (PWMCON0)
• PWM Control Register 1 (PWMCON1)
• Dead-Time Control Register (DTCON)
• Output Override Control Register (OVDCOND)
• Output State Register (OVDCONS)
• Fault Configuration Register (FLTCONFIG)
There are also 14 registers that are configured as
seven register pairs of 16 bits. These are used for the
configuration values of specific features. They are:
• PWM Time Base Registers (PTMRH and PTMRL)
• PWM Time Base Period Registers (PTPERH and
• PWM Special Event Trigger Compare Registers
• PWM Duty Cycle #0 Registers
• PWM Duty Cycle #1 Registers
• PWM Duty Cycle #2 Registers
• PWM Duty Cycle #3 Registers
All of these register pairs are double-buffered.
DS39616D-page 176
PTPERL)
(SEVTCMPH and SEVTCMPL)
(PDC0H and PDC0L)
(PDC1H and PDC1L)
(PDC2H and PDC2L)
(PDC3H and PDC3L)
Control Registers
18.2
The PWM module supports several modes of operation
that are beneficial for specific power and motor control
applications. Each mode of operation is described in
subsequent sections.
The PWM module is composed of several functional
blocks. The operation of each is explained separately
in relation to the several modes of operation:
• PWM Time Base
• PWM Time Base Interrupts
• PWM Period
• PWM Duty Cycle
• Dead-Time Generators
• PWM Output Overrides
• PWM Fault Inputs
• PWM Special Event Trigger
18.3
The PWM time base is provided by a 12-bit timer with
prescaler and postscaler functions. A simplified block
diagram of the PWM time base is shown in
The PWM time base is configured through the
PTCON0 and PTCON1 registers. The time base is
enabled or disabled by respectively setting or clearing
the PTEN bit in the PTCON1 register.
Note:
Module Functionality
PWM Time Base
The PTMR register pair (PTMRL:PTMRH)
is not cleared when the PTEN bit is
cleared in software.
 2010 Microchip Technology Inc.
Figure
18-4.

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