ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 186

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.6.8
15.6.9
186
ATtiny87/ATtiny167
LIN Identifier Register - LINIDR
LIN Data Buffer Selection Register - LINSEL
• Bits 7:6 - LP[1:0]: Parity
• Bits 5:4 - LDL[1:0]: LIN 1.3 Data Length
• Bits 3:0 - LID[3:0]: LIN 1.3 Identifier
• Bits 5:0 - LID[5:0]: LIN 2.1 Identifier
• Bits 7:4 - Reserved Bits
Initial Value
Read/Write
Initial Value
Read/Write
These bits are reserved for future use. For compatibility with future devices, they must be
written to zero when LINSEL is written.
Bit
Bit
– 00 = 2-byte response,
– 01 = 2-byte response,
– 10 = 4-byte response,
– 11 = 8-byte response.
In LIN mode:
In UART mode this field is unused.
In LIN 1.3 mode:
In UART mode this field is unused.
In LIN 1.3 mode: 4-bit identifier.
In UART mode this field is unused.
In LIN 2.1 mode: 6-bit identifier (no length transported).
In UART mode this field is unused.
LP1
R
7
0
7
-
-
-
LP0 = LID4 ^ LID2 ^ LID1 ^ LID0
LP1 = ! ( LID1 ^ LID3 ^ LID4 ^ LID5 )
LP0
R
6
0
6
-
-
-
LID5 /
LDL1
R/W
5
0
5
-
-
-
LID4 /
LDL0
R/W
4
-
-
-
4
0
LAINC
R/W
LID3
R/W
3
0
3
0
LINDX2
R/W
LID2
R/W
2
0
2
0
LINDX1
R/W
LID1
R/W
1
0
1
0
LINDX0
LID0
R/W
R/W
0
0
0
0
7728G–AVR–06/10
LINSEL
LINIDR