ATTINY167-15XD Atmel, ATTINY167-15XD Datasheet - Page 198

• Manufacturer Part Number: ATTINY167-15XD
• Description: MCU AVR 16K FLASH 15MHZ 20-TSSOP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY167-15XD

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 20-TSSOP
• Processor Series: ATTINY1x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.6.1
17.6.2
17.7
17.7.1
198
ADC Noise Canceler
ATtiny87/ATtiny167
ADC Input Channels
ADC Voltage Reference
Analog Input Circuitry
When changing channel selections, the user should observe the following guidelines to ensure
that the correct channel is selected:
In Single Conversion mode, always select the channel before starting the conversion. The
channel selection may be changed one ADC clock cycle after writing one to ADSC. However,
the simplest method is to wait for the conversion to complete before changing the channel
selection.
In Free Running mode, always select the channel before starting the first conversion. The
channel selection may be changed one ADC clock cycle after writing one to ADSC. However,
the simplest method is to wait for the first conversion to complete, and then change the chan-
nel selection. Since the next conversion has already started automatically, the next result will
reflect the previous channel selection. Subsequent conversions will reflect the new channel
selection.
The voltage reference for the ADC (V
ended channels that exceed V
either AVcc, internal 1.1V / 2.56V voltage reference or external AREF pin. The first ADC con-
version result after switching voltage reference source may be inaccurate, and the user is
advised to discard this result.
The ADC features a noise canceler that enables conversion during sleep mode to reduce
noise induced from the CPU core and other I/O peripherals. The noise canceler can be used
with ADC Noise Reduction and Idle mode. To make use of this feature, the following proce-
dure should be used:
Note that the ADC will not be automatically turned off when entering other sleep modes than
Idle mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before
entering such sleep modes to avoid excessive power consumption.
The analog input circuitry for single ended channels is illustrated in Figure 17-8. An analog
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin,
regardless of whether that channel is selected as input for the ADC. When the channel is
selected, the source must drive the S/H capacitor through the series resistance (combined
resistance in the input path).
a. Make sure that the ADC is enabled and is not busy converting. Single Conversion
b. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conver-
c. If no other interrupts occur before the ADC conversion completes, the ADC inter-
mode must be selected and the ADC conversion complete interrupt must be
enabled.
sion once the CPU has been halted.
rupt will wake up the CPU and execute the ADC Conversion Complete interrupt
routine. If another interrupt wakes up the CPU before the ADC conversion is com-
plete, that interrupt will be executed, and an ADC Conversion Complete interrupt
request will be generated when the ADC conversion completes. The CPU will
remain in active mode until a new sleep command is executed.
REF
will result in codes close to 0x3FF. V
REF
) indicates the conversion range for the ADC. Single
REF
can be selected as
7728G–AVR–06/10