EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 327

IC ACCLAIM MCU 256KB 144-BGA

EZ80F91NA050SC

Manufacturer Part Number
EZ80F91NA050SC
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F91NA050SC

Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Data Bus Width
8 bit
Maximum Clock Frequency
50 MHz
Data Ram Size
16 KB
Number Of Programmable I/os
32
Number Of Timers
16 Bit
Operating Supply Voltage
3 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.5 mm
Length
13 mm
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Width
13 mm
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No RoHS Version Available
Other names
269-3251

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F91NA050SC
Manufacturer:
Zilog
Quantity:
10 000
Part Number:
EZ80F91NA050SC00TR
Manufacturer:
Zilog
Quantity:
10 000
Table 205. EMAC Transmit Lower Boundary Pointer Register—Low Byte (EMAC_TLBP_L = 0042h)
Table 206. EMAC Transmit Lower Boundary Pointer Register—High Byte (EMAC_TLBP_H
= 0043h)*
PS019215-0910
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit 
Position
[7:0]
EMAC_TLBP_L
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit 
Position
[7:0]
EMAC_TLBP_H
Note: *Bits 7:5 are not used by the EMAC; these bits return 000.
EMAC Transmit Lower Boundary Pointer Register—Low and High Bytes
The EMAC Transmit Lower Boundary Pointer is set to the start of the Transmit buffer in
EMAC shared memory. See
Value
00h–
FFh
Value
00h–
FFh
R/W
R
7
0
7
1
Description
These bits represent the Low byte of the 2 byte Transmit
Lower Boundary Pointer value, {EMAC_TLBP_H,
EMAC_TLBP_L}. Bit 7 is bit 7 of the 16 bit value. Bit 0 is bit 0
(lsb) of the 16 bit value.
Description
These bits represent the High byte of the 2 byte Transmit
Lower Boundary Pointer value, {EMAC_TLBP_H,
EMAC_TLBP_L}. Bit 7 is bit 15 (msb) of the 16 bit value. Bits
7:5 default to 000 on reset; bit 0 is bit 8 of the 16-bit value.
R/W
R
6
0
6
1
R/W
R
5
0
5
0
Table 205
R/W
R
4
0
4
0
and
R/W
Table
R
3
0
3
0
206.
R/W
R
2
0
2
0
R/W
Ethernet Media Access Controller
R
1
0
1
0
Product Specification
R/W
R
0
0
0
0
318

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