EZ80F91NA050SC Zilog, EZ80F91NA050SC Datasheet - Page 377
EZ80F91NA050SC
Manufacturer Part Number
EZ80F91NA050SC
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050SC
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-LBGA
Data Bus Width
8 bit
Maximum Clock Frequency
50 MHz
Data Ram Size
16 KB
Number Of Programmable I/os
32
Number Of Timers
16 Bit
Operating Supply Voltage
3 V to 3.6 V
Mounting Style
SMD/SMT
Height
1.5 mm
Length
13 mm
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Width
13 mm
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
No RoHS Version Available
Other names
269-3251
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Open-source output 50
open-source output 11, 12, 13, 14, 15, 16, 17, 18,
19
Operating Modes, I2C 216
Operation of the eZ80F91 Device during ZDI Break
Points 238
Ordering Information 358
Output Compare 128
Output compare mode 143
output compare mode 127, 128, 130, 133
overrun condition, receiver 178
Overrun error 192
overrun error 175, 177, 185
Overview, Phase-Locked Loop 265
P
PA7 150
Packaging 357
Page Erase 101
page erase 112
Page Erase operation 113
page erase operation 101, 109
PAIR_EN 153, 154
parity error 177, 188, 192
Part Number Description 360
PB0 17
PB1 17
PB2 17
PB3 18
PB4 18
PB5 18
PB6 19
PB7 19
PC0 14, 20
PC1 14, 20
PC2 15, 20
PC3 15, 21
PC4 15, 21
PC5 16, 21
PC6 16, 22
PC7 16, 22
PD0 11, 198
PD1 11, 198
PS019215-0910
PD2 12, 198
PD3 12
PD4 12
PD5 13
PD6 13
PD7 13, 198
Phase Frequency Detector 265
Phase Frequency Detector, PLL 266
PHI 19, 261
PHI Clock output 48
PHY 22, 24, 28, 29, 292, 296, 314, 315, 325,
326, 327
PHY, MII 288, 313
Pin Characteristics 6
Pin Coverage, JTAG Boundary Scan 259
Pin Description 4
PLL Characteristics 272
PLL Control Register 0 269
PLL Control Register 1 270
PLL Divider Control Register—Low and High
Bytes 268
PLL Loop Filter 13
PLL Normal Operation 267
PLL Registers 268
PLL_VDD 268
PLL_VSS 268
Poll Mode Transfers 181
POP, Op Code Map 280, 282, 284
POR Voltage Threshold 341
POR voltage threshold 42
POR/VBO analog RESET duration 341
POR/VBO DC current consumption 341
POR/VBO Hysteresis 341
Port A 20, 21, 47, 49, 58, 62, 63, 145
Port x Alternate Register 1 56
Port x Alternate Register 2 56
Port x Data Direction Registers 55
Port x Data Registers 55
Potential Hazards of Enabling Bus Requests During
Debug Mode 239
Power connections 2
Power Requirement to the Phase-Locked Loop
Function 268
Power-On Reset 41, 42, 340
Product Specification
Index
368
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