M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 232
![IC M16C MCU FLASH 100QFP](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
M306N5FCTFP
Manufacturer Part Number
M306N5FCTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N5FCTFPUK.pdf
(90 pages)
3.M306N5FCTFPU0.pdf
(408 pages)
Specifications of M306N5FCTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
19.1 CAN Module-Related Registers
The CAN0 module has the following registers.
19.1.1 CAN0 Message Box
19.1.2 Acceptance Mask Registers
19.1.3 CAN SFR Registers
Explanation of each register is given below.
A CAN module is equipped with 16 slots (16 bytes or 8 words each). Slots 14 and 15 can be used as
Basic CAN.
• Priority of the slots: The smaller the number of the slot, the higher the priority, in both transmission and
• A program can define whether a slot is defined as transmitter or receiver.
A CAN module is equipped with 3 masks for the acceptance filter.
• CAN0 global mask register (C0GMR register: 6 bytes)
• CAN0 local mask A register (C0LMAR register: 6 bytes)
• CAN0 local mask B register (C0LMBR register: 6 bytes)
• CAN0 message control register j (j = 0 to 15) (C0MCTLj register: 8 bits ✕ 16)
• CANi control register (i = 0, 1) (CiCTLR register: 16 bits)
• CAN0 status register (C0STR register: 16 bits)
• CAN0 slot status register (C0SSTR register: 16 bits)
• CAN0 interrupt control register (C0ICR register: 16 bits)
• CAN0 extended ID register (C0IDR register: 16 bits)
• CAN0 configuration register (C0CONR register: 16 bits)
• CAN0 receive error count register (C0RECR register: 8 bits)
• CAN0 transmit error count register (C0TECR register: 8 bits)
• CAN0 time stamp register (C0TSR register: 16 bits)
• CAN0 acceptance filter support register (C0AFS register: 16 bits)
reception.
Configuration of the masking condition for acceptance filtering processing to slots 0 to 13
Configuration of the masking condition for acceptance filtering processing to slot 14
Configuration of the masking condition for acceptance filtering processing to slot 15
Control of transmission and reception of a corresponding slot
Control of the CAN protocol
Indication of the protocol status
Indication of the status of contents of each slot
Selection of “interrupt enabled or disabled” for each slot
Selection of ID format (standard or extended) for each slot
Configuration of the bus timing
Indication of the error status of the CAN module in reception: the counter value is incremented or
decremented according to the error occurrence.
Indication of the error status of the CAN module in transmission: the counter value is incremented or
decremented according to the error occurrence.
Indication of the value of the time stamp counter
Decoding the received ID for use by the acceptance filter support unit
Apr 14, 2006
page 210 of 372
19. CAN Module
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