M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 285
![IC M16C MCU FLASH 100QFP](/photos/12/21/122166/qfp100-g1_pkg_sml.jpg)
M306N5FCTFP
Manufacturer Part Number
M306N5FCTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M306N5FCTFPUK.pdf
(90 pages)
3.M306N5FCTFPU0.pdf
(408 pages)
Specifications of M306N5FCTFP
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
Figure 21.10 Lock Bit Program Command
21.3.5.6 Erase All Unlocked Block
21.3.5.7 Lock Bit Program Command
The erase all unlocked block command erases all blocks except the block A.
By writing xxA7h in the first bus cycle and xxD0h in the second bus cycle, an auto-erase (erase and
verify) operation will run continuously in all blocks except the block A.
The FMR00 bit in the FMR0 register indicates whether an auto-erase operation has been completed.
After the completion of an auto-erase operation, the FMR07 bit in the FMR0 register indicates whether
or not the auto-erase operation has been completed as expected.
The lock bit can protect each block from being programmed inadvertently. (Refer to 21.3.6 Data Protect
Function.)
In EW1 mode, do not execute this command when the lock bit for any block storing the rewrite control
program is set to 1 (unlocked) or when the FMR02 bit in the FMR0 register is set to 1 (lock bit disabled).
In EW0 mode, the MCU enters read status register mode as soon as an auto-erase operation starts. The
status register can be read. The SR7 bit in the status register is set to 0 (busy) at the same time an
auto-erase operation starts. It is set to 1 (ready) when an auto-erase operation is completed. The MCU
remains in read status register mode until the read array command or read lock bit status command is
written.
Only blocks 0 to 6 can be erased by the erase all unlocked block command. The block A cannot be
erased. Use the block erase command to erase the block A.
The lock bit program command sets the lock bit for a specified block to 0 (locked).
By writing xx77h in the first bus cycle and xxD0h to the highest-order even address of a block in the second
bus cycle, the lock bit for the specified block is set to 0. The address value specified in the first bus cycle
must be the same highest-order even address of a block specified in the second bus cycle.
Figure 21.10 shows a flow chart of the Lock Bit Program Command. Execute read lock bit status
command to read lock bit state (lock bit data).
The FMR00 bit in the FMR0 register indicates whether a lock bit program operation is completed.
Refer to 21.3.6 Data Protect Function for details on lock bit functions and how to set it to 1 (unlocked).
Apr 14, 2006
page 263 of 372
NOTE:
1.Write the command code and data to even addresses.
Write xxD0h to the highest-order
block address
Write command code xx77h to
the highest-order block address
Lock bit program operation
is completed
Full status check
FMR00=1?
Start
YES
NO
21. Flash Memory Version
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