M306N5FCTFP Renesas Electronics America, M306N5FCTFP Datasheet - Page 251

IC M16C MCU FLASH 100QFP

M306N5FCTFP

Manufacturer Part Number
M306N5FCTFP
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/6Nr
Datasheets

Specifications of M306N5FCTFP

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
87
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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M16C/6N Group (M16C/6N5)
Rev.2.40
REJ09B0011-0240
19.12 Return from Bus Off Function
19.13 Time Stamp Counter and Time Stamp Function
19.14 Listen-Only Mode
When the protocol controller enters bus off state, it is possible to make it forced return from bus off state by
setting the RetBusOff bit in the C0CTLR register to 1 (force return from bus off). At this time, the error state
changes from bus off state to error active state. If the RetBusOff bit is set to 1, registers C0RECR and
C0TECR are initialized and the State_BusOff bit in the C0STR register is set to 0 (CAN module is not in
error bus off state). However, registers of the CAN module such as C0CONR register and the content of
each slot are not initialized.
When the C0TSR register is read, the value of the time stamp counter at the moment is read. The period of
the time stamp counter reference clock is the same as that of 1 bit time that is configured by the C0CONR
register. The time stamp counter functions as a free run counter.
The 1 bit time period can be divided by 1 (undivided), 2, 4 or 8 to produce the time stamp counter reference
clock. Use the TSPreScale bit in the C0CTLR register to select the divide-by-n value.
The time stamp counter is equipped with a register that captures the counter value when the protocol
controller regards it as a successful reception. The captured value is stored when a time stamp value is
stored in a reception slot.
When the RXOnly bit in the C0CTLR register is set to 1, the module enters Listen-only mode.
In Listen-only mode, no transmission, such as data frames, error frames, and ACK response, is performed
to bus.
When Listen-only mode is selected, do not request the transmission.
Apr 14, 2006
page 229 of 372
19. CAN Module

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