MFRC52301HN1,151 NXP Semiconductors, MFRC52301HN1,151 Datasheet - Page 41

• Manufacturer Part Number: MFRC52301HN1,151
• Description: IC MIFARE READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52301HN1,151

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Current: 7 mA
• Operating Voltage: 2.5 V to 3.6 V
• Product: RFID Readers
• Wireless Frequency: 13.56 MHz
• Interface Type: RS-232, I2C
• Data Rate: 100 Kbps
• Operating Temperature Range: - 25 C to +85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4766; 935282956151; MFRC52301HN1

NXP Semiconductors
MFRC523_32
Product data sheet
PUBLIC
9.2.1.8 Status1Reg register
Contains status bits of the CRC, interrupt and FIFO buffer.
Table 35.
Table 36.
Bit
Symbol
Access
Bit Symbol
7
6
5
4
3
2
1
0
reserved
CRCOk
CRCReady 1
IRq
TRunning
reserved
HiAlert
LoAlert
reserved CRCOk CRCReady
Status1Reg register (address 07h); reset value: 21h bit allocation
Status1Reg register bit descriptions
7
-
Value Description
-
1
-
1
-
1
1
Rev. 3.2 — 12 January 2010
R
6
reserved for future use
the CRC result is zero
for data transmission and reception, the CRCOk bit is undefined: use the
ErrorReg register’s CRCErr bit
indicates the status of the CRC coprocessor, during calculation the
value changes to logic 0, when the calculation is done correctly the
value changes to logic 1
the CRC calculation has finished
only valid for the CRC coprocessor calculation using the CalcCRC
command
indicates if any interrupt source requests attention with respect to the
setting of the interrupt enable bits: see the ComIEnReg and DivIEnReg
registers
MFRC523’s timer unit is running, i.e. the timer will decrement the
TCounterValReg register with the next timer clock
Remark: in gated mode, the TRunning bit is set to logic 1 when the
timer is enabled by TModeReg register’s TGated[1:0] bits; this bit is not
influenced by the gated signal
reserved for future use
the number of bytes stored in the FIFO buffer corresponds to equation:
example:
the number of bytes stored in the FIFO buffer corresponds to equation:
example:
HiAlert
LoAlert
FIFO length = 60, WaterLevel = 4
FIFO length = 59, WaterLevel = 4
FIFO length = 4, WaterLevel = 4
FIFO length = 5, WaterLevel = 4
115232
=
=
R
5
FIFOLength WaterLevel
64 FIFOLength
–
IRq
R
4
TRunning reserved
R
WaterLevel
3
LoAlert = 1
LoAlert = 0
HiAlert = 1
HiAlert = 0
2
-
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
HiAlert
R
1
LoAlert
41 of 98
R
0