MFRC52301HN1,151 NXP Semiconductors, MFRC52301HN1,151 Datasheet - Page 9

• Manufacturer Part Number: MFRC52301HN1,151
• Description: IC MIFARE READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52301HN1,151

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Current: 7 mA
• Operating Voltage: 2.5 V to 3.6 V
• Product: RFID Readers
• Wireless Frequency: 13.56 MHz
• Interface Type: RS-232, I2C
• Data Rate: 100 Kbps
• Operating Temperature Range: - 25 C to +85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4766; 935282956151; MFRC52301HN1

NXP Semiconductors
MFRC523_32
Product data sheet
PUBLIC
Fig 6.
ISO/IEC 14443 A framing at 106 kBd
ISO/IEC 14443 A framing at 212 kBd, 424 kBd and 848 kBd
subcarrier clocks
Data coding and framing according to ISO/IEC 14443 A
burst of 32
8.3.1 Automatic microcontroller interface detection
start bit is 1
start bit is 0
8.2 ISO/IEC 14443 B functionality
8.3 Digital interfaces
start
start
The internal CRC coprocessor calculates the CRC value based on ISO/IEC 14443 A
part 3 and handles parity generation internally according to the transfer speed. Automatic
parity generation can be switched off using the ManualRCVReg register’s ParityDisable
bit.
The MFRC523 reader IC fully supports international standard ISO 14443 which includes
communication schemes ISO 14443 A and ISO 14443 B.
Refer to the ISO 14443 reference documents Identification cards - Contactless integrated
circuit cards - Proximity cards (parts 1 to 4).
Remark: NXP Semiconductors does not offer a software library to enable design-in of the
ISO 14443 B protocol.
The MFRC523 supports direct interfacing of hosts using SPI, I
interfaces. The MFRC523 resets its interface and checks the current host interface type
automatically after performing a power-on or hard reset. The MFRC523 identifies the host
interface by sensing the logic levels on the control pins after the reset phase. This is done
using a combination of fixed pin connections.
configurations.
Table 5.
Pin
SDA
I2C
EA
D7
8-bit data
8-bit data
Connection protocol for detecting different interface types
Rev. 3.2 — 12 January 2010
Interface type
UART (input)
RX
0
0
TX
parity
parity
odd
odd
115232
8-bit data
8-bit data
SPI (output)
NSS
0
1
MISO
Table 5
shows the different connection
parity
parity
odd
odd
2
C-bus or serial UART
Contactless reader IC
I
SDA
1
EA
SCL
8-bit data
8-bit data
2
MFRC523
C-bus (I/O)
even parity at the
end of the frame
© NXP B.V. 2010. All rights reserved.
001aak585
parity
parity
even
odd
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