MFRC52301HN1,151 NXP Semiconductors, MFRC52301HN1,151 Datasheet - Page 80

• Manufacturer Part Number: MFRC52301HN1,151
• Description: IC MIFARE READER 32-HVQFN
• Manufacturer: NXP Semiconductors
• Series: MIFARE®r

Specifications of MFRC52301HN1,151

• Frequency: 13.56MHz
• Package / Case: 32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
• Operating Current: 7 mA
• Operating Voltage: 2.5 V to 3.6 V
• Product: RFID Readers
• Wireless Frequency: 13.56 MHz
• Interface Type: RS-232, I2C
• Data Rate: 100 Kbps
• Operating Temperature Range: - 25 C to +85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Rf Type: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4766; 935282956151; MFRC52301HN1

NXP Semiconductors
16. Test information
MFRC523_32
Product data sheet
PUBLIC
16.1.1 Self test
16.1.2 Test bus
16.1 Test signals
The MFRC523 has the capability to perform a digital self test. The self test is started by
using the following procedure:
FIFO buffer byte values for version B1h:
00h, C6h, 37h, D5h, 32h, B7h, 57h, 5Ch
C2h, D8h, 7Ch, 4Dh, D9h, 70h, C7h, 73h
10h, E6h, D2h, AAh, 5Eh, A1h, 3Eh, 5Ah
14h, AFh, 30h, 61h, C9h, 70h, DBh, 2Eh
64h, 22h, 72h, B5h, BDh, 65h, F4h, ECh
22h, BCh, D3h, 72h, 35h, CDh, AAh, 41h
1Fh, A7h, F3h, 53h, 14h, DEh, 7Eh, 02h
D9h, 0Fh, B5h, 5Eh, 25h, 1Dh, 29h, 79h
The test bus is used for production tests. The following configuration can be used to
improve the design of a system using the MFRC523. The test bus allows internal signals
to be routed to the digital interface. The test bus comprises two sets of test signals which
are selected using their subaddress specified in the TestSel2Reg register’s
TestBusSel[4:0] bits. The test signals and their related digital output pins are described in
Table 156
Table 156. Test bus signals: TestBusSel[4:0] = 07h
Pins
D6
D5
D4
D3
D2
D1
1. Perform a soft reset.
2. Clear the internal buffer by writing 25 bytes of 00h and implement the Config
3. Enable the self test by writing 09h to the AutoTestReg register.
4. Write 00h to the FIFO buffer.
5. Start the self test with the CalcCRC command.
6. The self test is initiated.
7. When the self test has completed, the FIFO buffer contains the following 64 bytes:
command.
and
Internal
signal name
s_data
s_coll
s_valid
s_over
RCV_reset
-
Table
157.
Rev. 3.2 — 12 January 2010
Description
received data stream
bit-collision detected (106 kBd only)
s_data and s_coll signals are valid
receiver has detected a stop condition
receiver is reset
reserved
115232
Contactless reader IC
MFRC523
© NXP B.V. 2010. All rights reserved.
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