XR17V258IV-F Exar Corporation, XR17V258IV-F Datasheet - Page 10

• Manufacturer Part Number: XR17V258IV-F
• Description: IC UART PCI BUS OCTAL 144LQFP
• Manufacturer: Exar Corporation
• Type: Octal UARTr

Specifications of XR17V258IV-F

• Number Of Channels: 8
• Package / Case: 144-LQFP
• Features: *
• Fifo's: 64 Byte
• Protocol: RS485
• Voltage - Supply: 3.3V, 5V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Data Rate: 8 Mbps
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Supply Current: 4 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 45 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• No. Of Channels: 8
• Uart Features: Tx/Rx FIFO Counters
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 144
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
A
O
DDRESS
0x18h
0x0C
0x1C
0x00
0x04
0x08
0x10
0x14
0x20
FFSET
31:16
15:0
31
30
29:28
27
26:25
24
23
22
21
20
19:16
15:9,7,
5,4,3,2
8
6
1
0
31:8
7:0
31:24
23:16
15:8
7:0
31:12
11:0
31:0
31:0
31:0
31:0
B
ITS
EWR
EWR
RWC
RWC
RWR
RWR
RWR
EWR
RWR
T
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
T
YPE
ABLE
1: PCI L
Device ID (Exar device ID number)
Vendor ID (Exar) specified by PCISIG
Parity error detected. Cleared by writing a logic 1.
System error detected. Cleared by writing a logic 1.
Unused
Target Abort.
DEVSEL# timing.
Unemployments bus master error reporting bit
Fast back to back transactions are supported
Reserved Status bit
66MHz capable
Capabilities List
Reserved Status bits
Command bits (reserved)
SERR# driver enable. logic 1=enable driver and 0=disable driver
Parity error enable. logic 1=respond to parity error and 0=ignore
Command controls a device’s response to mem space accesses:
0=disable mem space accesses, 1=enable mem space accesses
Device’s response to I/O space accesses is disabled.
(0 = disable I/O space accesses)
Class Code (Default is ’Simple 550 Communication Controller’)
Revision ID (Exar device revision number)
BIST (Built-in Self Test)
Header Type (a single function device with one BAR)
Unimplemented Latency Timer (needed only for bus master)
Unimplemented Cache Line Size
Memory Base Address Register (BAR)
Claims a 4K address space for the memory mapped UARTs
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
Unimplemented Base Address Register (returns zeros)
OCAL
B
US
C
ONFIGURATION
10
D
ESCRIPTION
S
PACE
R
EGISTERS
Current Rev. value
(
HEX OR BINARY
R
0x00000000
0x00000000
0x00000000
0x00000000
ESET
0x070002
0x0258
0x13A8
0x0000
0000b
0x000
0x00
0x00
0x00
0x00
0x00
00b
00b
0b
0b
0b
0b
1b
0b
1b
1b
0b
0b
0b
0b
REV. 1.0.2
V
ALUE
)