XR17V258IV-F Exar Corporation, XR17V258IV-F Datasheet - Page 6

IC UART PCI BUS OCTAL 144LQFP

XR17V258IV-F

Manufacturer Part Number
XR17V258IV-F
Description
IC UART PCI BUS OCTAL 144LQFP
Manufacturer
Exar Corporation
Type
Octal UARTr
Datasheet

Specifications of XR17V258IV-F

Number Of Channels
8
Package / Case
144-LQFP
Features
*
Fifo's
64 Byte
Protocol
RS485
Voltage - Supply
3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Data Rate
8 Mbps
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current
4 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 45 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
No. Of Channels
8
Uart Features
Tx/Rx FIFO Counters
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LQFP
No. Of Pins
144
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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XR17V258
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
PIN DESCRIPTIONS
ANCILLARY SIGNALS
RTS7#
CTS7#
DTR7#
DSR7#
MPIO0
MPIO1
MPIO2
MPIO3
MPIO4
MPIO5
MPIO6
MPIO7
XTAL1
XTAL2
EEDO
EECK
EECS
CD7#
N
EEDI
RI7#
RX7
AME
P
108
107
109
116
115
114
113
110
47
52
48
53
49
50
51
74
73
68
67
66
65
IN
#
T
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
YPE
O
O
O
O
O
O
I
I
I
I
I
I
I
UART channel 7 Receive Data or infrared receive data. Normal RXD input
idles at HIGH condition. The infrared pulses can be inverted prior to decoding
by setting FCTR bit [4].
UART channel 7 Request to Send or general purpose output (active LOW).
UART channel 7 Clear to Send or general purpose input (active LOW).
UART channel 7 Data Terminal Ready or general purpose output (active
LOW).
UART channel 7 Data Set Ready or general purpose input (active LOW).
UART channel 7 Carrier Detect or general purpose input (active LOW).
UART channel 7 Ring Indicator or general purpose input (active LOW).
Multi-purpose input/output 0. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT
Multi-purpose input/output 1. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 2. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 3. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 4. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 5. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 6. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Multi-purpose input/output 7. The function of this pin is defined thru the Con-
figuration Register MPIOSEL, MPIOLVL, MPIOINV, MPIO3T and MPIOINT.
Serial clock to EEPROM. An internal clock of CLK divide by 256 is used for
reading the vendor and sub-vendor ID during power up or reset. However, it
can be manually clocked thru the Configuration Register REGB.
Chip select to a EEPROM device like 93C46. It is manually selectable thru
the Configuration Register REGB. Requires a pull-up 4.7K ohm resistor for
external sensing of EEPROM during power up. See DAN112 for further
details.
Write data to EEPROM device. It is manually accessible thru the Configura-
tion Register REGB.
Read data from EEPROM device. It is manually accessible thru the Configu-
ration Register REGB.
Crystal or external clock input.
Crystal or buffered clock output.
6
D
ESCRIPTION
REV. 1.0.2

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