IPR-SDRAM/HPDDR2 Altera, IPR-SDRAM/HPDDR2 Datasheet - Page 9

• Manufacturer Part Number: IPR-SDRAM/HPDDR2
• Description: IP CORE Renewal Of IP-SDRAM/HDDR2
• Manufacturer: Altera

Specifications of IPR-SDRAM/HPDDR2

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Stratix FPGAs, Quartus II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

Chapter 1: About These MegaCore Functions
Performance and Resource Utilization
Table 1–5. Resource Utilization in Cyclone III Devices
Table 1–6. Resource Utilization in Stratix II and Stratix II GX Devices
© March 2009 Altera Corporation
Controller Rate
Controller Rate
Half
Full
Half
Full
Local Data Width
Width (Bits)
Local Data
Table 1–5
controller in AFI mode (including ALTMEMPHY) for Cyclone III devices.
Table 1–6
controller in AFI mode (including ALTMEMPHY) for Stratix II and Stratix II GX
devices.
256
288
256
288
(Bits)
32
64
32
64
256
288
256
288
32
64
32
64
shows typical sizes for the DDR or DDR2 SDRAM high-performance
shows typical sizes for the DDR or DDR2 SDRAM high-performance
Memory Width
Memory Width
(Bits)
16
64
72
16
64
72
(Bits)
8
8
16
64
72
16
64
72
8
8
Combinational
Combinational
ALUTs
1,853
1,901
2,206
2,281
1,675
1,675
1,743
1740
ALUTs
2,683
2,905
4,224
4,478
2,386
2,526
3,257
3,385
DDR and DDR2 SDRAM High-Performance Controller User Guide
Dedicated Logic
Dedicated Logic
Registers
1,581
1,757
2,802
2,978
1,371
1,456
1,976
2,062
Registers
1,563
1,760
2,938
3,135
1,276
1,387
2,037
2,146
M512
4
4
5
4
6
3
3
4
Memory
Memory
(M9K)
17
18
10
3
5
3
3
9
M4K
15
17
2
4
0
3
9
9
1–5