IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 164

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

5–80
Video and Image Processing Suite User Guide
1
The latency associated with the initial buffering phase, when a MegaCore function
first receives video data, is not included. For example, the Deinterlacer MegaCore
function in motion-adaptive mode initially buffers four fields of video in external
memory without outputting data. After the initial buffering phase, the latency from
field input to frame output (assuming the output frame rate is the same as the input
field rate) is one field + O (lines).
Chapter 5: Functional Descriptions
May 2011 Altera Corporation
Latency