IPS-VIDEO Altera, IPS-VIDEO Datasheet - Page 30

• Manufacturer Part Number: IPS-VIDEO
• Description: MegaCore Suite W/ 17 DSP Video/image Processing Functions
• Manufacturer: Altera
• Type: -r

Specifications of IPS-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: Suite of IP Functions for Video and Image Processing
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

2–2
Video and Image Processing Suite User Guide
Figure 2–2. Design Flows
Note to
(1) Altera IP cores may or may not support the Qsys and SOPC Builder design flows.
The MegaWizard Plug-In Manager flow offers the following advantages:
■
■
The SOPC Builder flow offer the following advantages:
■
■
■
The Qsys flow offers the following additional advantages over SOPC Builder:
■
■
■
Allows you to parameterize an IP core variant and instantiate into an existing
design
For some IP cores, this flow generates a complete example design and testbench.
Generates simulation environment
Allows you to integrate Altera-provided custom components
Uses Avalon
Provides visualization of hierarchical designs
Allows greater performance through interconnect elements and pipelining
Provides closer integration with the Quartus II software
Figure
2–2:
®
memory-mapped (Avalon-MM) interfaces
Functional Simulation
Expected Results?
Simulation Give
Debug Design
(Note 1)
Perform
Does
SOPC Builder
SOPC Builder System
Qsys or
Specify Parameters
Complete Qsys or
Flow
Yes
Optional
and Compile Design
Select Design Flow
Add Constraints
IP Complete
Chapter 2: Getting Started with Altera IP Cores
Specify Parameters
May 2011 Altera Corporation
MegaWizard
Flow
Design Flows