EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 168

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

Cyclone III Device I/O Features
Figure 7–8. Cyclone III OCT Block Placement
7–16
Cyclone III Device Handbook, Volume 1
I/O Bank 3
I/O Bank 8
On-chip termination with calibration is achieved using the OCT
calibration block circuitry. There is one OCT calibration block in bank 2,
4, 5, and 7. Each calibration block supports each side of the I/O banks.
Since there are two I/O banks sharing the same calibration block, both
banks must have the same V
two related banks have different V
calibration block resides can enable the OCT calibration.
shows the top level view of the OCT calibration blocks placement.
Each calibration block comes with a pair of R
use OCT with calibration, these two pins need to be connected with
external resistors of 25 Ω ±1% or 50 Ω ±1%. The external resistors are
compared with the internal resistance using comparators. The resultant
outputs of the comparators are used by the OCT calibration block to
dynamically adjust the buffer impendance. When OCT calibration is not
used, R
CYCLONE III
UP
and R
I/O Bank 4
I/O Bank 7
DN
pins can be used as regular I/Os.
CCIO
if both banks enable OCT calibration. If
CCIOs
, only the bank where the
Altera Corporation-Preliminary
UP
and R
calibration block
Calibration block
I/O bank without
I/O bank with
calibration block
DN
coverage
pins. When you
Figure 7–8
March 2007