EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 219

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

Figure 9–2. Cyclone III External Memory Data Path
Note to
(1)
Cyclone III
Memory
Interfaces Pin
Support
Altera Corporation-Preliminary
March 2007
All clocks shown here are global clocks.
Figure
PLL
OE
9–2:
-90˚ Shifted Clock
Register
System Clock
IOE
Register
IOE
GND
V CC
Capture Clock
Figure 9–2
interface data path in Cyclone III devices.
Cyclone III devices use data (DQ), data strobe (DQS), clock, command, and
address pins to interface with external memory. Some memory interfaces
use the data mask (DM) or byte write select (BWS#) pins to enable data
masking. This section describes how Cyclone III supports all these
different pins.
Register
Register
IOE
IOE
DQS/CQ/CQn
shows the block diagram of a typical external memory
Figure 9–3
OE
Note (1)
Register
IOE
Register
IOE
illustrates the DQ and DQS pins.
DataA
DataB
Cyclone III Memory Interfaces Pin Support
Cyclone III Device Handbook, Volume 1
Register
Register
IOE
IOE
DQ
Register
Register
LE
LE
Register
LE
9–5