EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 185

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EP3C16F256I7

Manufacturer Part Number
EP3C16F256I7
Description
Cyclone III
Manufacturer
Altera
Datasheet

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Altera Corporation-Preliminary
March 2007
For the LVDS I/O standard:
1
For the RSDS and mini-LVDS I/O standards:
1
For the PPDS I/O standard:
1
Single-ended inputs can be no closer than four pads away from an
LVDS I/O pad.
Single-ended outputs can be no closer than five pads away from an
LVDS I/O pad.
A maximum of four 160-MHz LVDS output channels per V
ground pair in column I/O banks.
A maximum of three 320-MHz LVDS output channels per V
ground pair in column I/O banks.
A maximum of four 210-MHz LVDS output channels per V
ground pair in row I/O banks.
A maximum of three 420-MHz LVDS output channels per V
ground pair in row I/O banks.
Single-ended inputs can be no closer than four pads away from an
RSDS and mini-LVDS output pad.
Single-ended outputs can be no closer than five pads away from an
RSDS and mini-LVDS output pad.
A maximum of three 85-MHz RSDS and mini-LVDS output channels
per V
A maximum of three 180-MHz RSDS output channels per V
ground pair in row I/O banks.
A maximum of three 220-MHz mini-LVDS output channels per V
and ground pair in row I/O banks.
Single-ended inputs can be no closer than four pads away from an
PPDS output pad.
Single-ended outputs can be no closer than five pads away from an
PPDS output pad.
A maximum of three 85-MHz PPDS output channels per V
ground pair in column I/O banks.
A maximum of three 220-MHz PPDS output channels per V
ground pair in row I/O banks.
The Quartus II software only checks the first two cases.
The Quartus II software only checks the first two cases.
The Quartus II software only checks the first two cases.
CCIO
and ground pair in column I/O banks.
Cyclone III Device Handbook, Volume 1
Pad Placement and DC Guidelines
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
CCIO
and
and
and
7–33
and
and
and
and
CCIO

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