EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 82

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

Memory Blocks in Cyclone III Devices
Figure 4–21. Cyclone III Single-Clock Mode in Single-Port Mode
Note to
(1)
Design
Considerations
4–28
Cyclone III Device Handbook, Volume 1
addressstall
address[ ]
byteena[ ]
enable
data[ ]
See the Cyclone III Device Family Data Sheet in the Cyclone III Device Handbook, Volume 1, for more information on the
MultiTrack interconnect.
clock
wren
rden
Figure
6 LAB Row
Clocks
6
4–21:
Read-During-Write Operations
“Same-Port Read-During-Write Mode” on page 4–29
Read-During-Write Mode” on page 4–30
various RAM configurations when reading from an address during a
write operation at that same address. There are two read-during-write
data flows: same-port and mixed-port.
D
ENA
D
ENA
D
ENA
D
ENA
D
ENA
Q
Q
Q
Q
Q
Data In
Address
Byte Enable
Address
Clock Enable
Read Enable
Write Enable
Memory Block
1,024 ´ 4
2,048 ´ 2
4,096 ´ 1
256 ´ 16
512 ´ 8
Data Out
describe the functionality of the
Altera Corporation-Preliminary
D
ENA
and
Q
“Mixed-Port
March 2007
To MultiTrack
Interconnect (1)