HC230F1020 Altera, HC230F1020 Datasheet - Page 213

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

Altera Corporation
September 2008
Table 8–17
information can also be found in the HardCopy II Description, Architecture,
and Features chapter of the HardCopy Series Handbook.
Total RAM bits (including
parity bits)
Configurations
Parity bits
Byte enable
Pack mode
Address clock enable
Single-port memory
Simple dual-port memory
True dual-port memory
Embedded shift register
ROM
FIFO buffer
Simple dual-port mixed width
support
True dual-port mixed width
support
Memory initialization file (.mif)
Mixed-clock mode
Power-up condition
Register clears
Same-port read-during-write
Table 8–17. HardCopy II Embedded Memory Features (Part 1 of 2)
Feature
lists the M4K and M-RAM block supported features. This
Stratix II and HardCopy II Companion Memory Blocks
Outputs unknown
Output registers only
New data available at
positive clock edge
M4K Blocks
256 × 16
256 × 18
128 × 32
128 × 36
512 × 8
512 × 9
2K × 2
1K × 4
4K × 1
4,608
v
v
v
v
v
v
v
v
v
v
v
v
v
(1)
Outputs unknown
Output registers only
New data available at
positive clock edge
M-RAM Blocks
32K × 16
32K × 18
16K × 32
16K × 36
4K × 128
4K × 144
589,824
64K × 8
64K × 9
8K × 64
8K × 72
v
v
v
v
v
v
v
v
v
v
v
—
—
—
Preliminary
8–25