HC230F1020 Altera, HC230F1020 Datasheet - Page 95

• Manufacturer Part Number: HC230F1020
• Manufacturer: Altera

Specifications of HC230F1020

• Lead Free Status / RoHS Status: Not Compliant

HardCopy II
Development
Flow
Altera Corporation
September 2008
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In the Quartus II software, you have two methods for designing your
Stratix II FPGA and HardCopy II companion device together in one
Quartus II project.
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Both of these flows are illustrated at a high level in
features in the HardCopy II Utilities menu assist you in completing your
HardCopy II design for submission to Altera’s HardCopy Design Center
for back-end implementation.
HardCopy II Device Preliminary Timing—The Quartus II software
performs a timing analysis of HardCopy II devices based on
preliminary timing models and Fitter placements. Final timing
results for HardCopy II devices are provided by the HardCopy
Design Center.
HardCopy II Handoff Report-—The Quartus II software generates a
handoff report containing information about the HardCopy II design
used by the HardCopy Design Center in the design review process.
Formal Verification—Cadence Encounter Conformal software can
now perform formal verification between the source RTL design files
and post-compile gate level netlist from a HardCopy II design.
Design the HardCopy II device first, and create the Stratix II FPGA
companion device second and build your prototype for in-system
verification
Design the Stratix II FPGA first and create a HardCopy II companion
device second
HardCopy II Development Flow
Figure
5–1. The added
5–3