PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 123

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

REGISTER 10-9:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
Unimplemented: Read as ‘0’
RC2IE: AUSART Receive Interrupt Enable bit
1 = Enabled
0 = Disabled
TX2IE: AUSART Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
CCP2IE: CCP2 Interrupt Enable bit
1 = Enabled
0 = Disabled
CCP1IE: CCP1 Interrupt Enable bit
1 = Enabled
0 = Disabled
Unimplemented: Read as ‘0’
U-0
—
PIE3: PERIPHERAL INTERRUPT ENABLE REGISTER 3
W = Writable bit
‘1’ = Bit is set
RC2IE
R-0
TX2IE
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F85J11 FAMILY
U-0
—
CCP2IE
R/W-0
x = Bit is unknown
CCP1IE
R/W-0
DS39774D-page 123
U-0
—
bit 0