PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 289

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

23.3.2
When the on-chip regulator is enabled, PIC18F85J11
family devices also have a simple Brown-out Reset
capability. If the voltage supplied to the regulator falls to
a level that is inadequate to maintain a regulated output
for full-speed operation, the regulator Reset circuitry
will generate a Brown-out Reset. This event is captured
by the BOR flag bit (RCON<0>).
The operation of the Brown-out Reset is described in
more detail in Section 5.4 “Brown-out Reset (BOR)”
and Section 5.4.1 “Detecting BOR”.
23.3.3
The on-chip regulator is designed to meet the power-up
requirements for the device. If the application does not
use the regulator, then strict power-up conditions must
be adhered to. While powering up, V
never exceed V
 2010 Microchip Technology Inc.
ON-CHIP REGULATOR AND BOR
POWER-UP REQUIREMENTS
DD
by 0.3 volts.
DDCORE
must
PIC18F85J11 FAMILY
23.3.4
When enabled, the on-chip regulator always consumes
a small incremental amount of current over I
includes when the device is in Sleep mode, even
though the core digital logic does not require power. To
provide additional savings in applications where power
resources are critical, the regulator can be configured
to automatically disable itself whenever the device
goes into Sleep mode. This feature is controlled by the
REGSLP bit (WDTCON<7>). Setting this bit disables
the regulator in Sleep mode and reduces its current
consumption to a minimum.
Substantial Sleep-mode power savings can be
obtained by setting the REGSLP bit, but this will
increase device wake-up time to ensure the regulator
has enough time to stabilize.
The REGSLP bit is cleared automatically by hardware
when a Low-Voltage Detect condition occurs. The
REGSLP bit can be set again in software, which would
keep the voltage regulator in Low-Power mode. This is
not recommended, however, if any write operations to
the Flash will be performed.
OPERATION IN SLEEP MODE
DS39774D-page 289
DD
. This