PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 149

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

TABLE 11-19: PORTJ FUNCTIONS
TABLE 11-20: SUMMARY OF REGISTERS ASSOCIATED WITH PORTJ
 2010 Microchip Technology Inc.
RJ0/ALE
RJ1/OE
RJ2/WRL
RJ3/WRH
RJ4/BA0
RJ5/CE
RJ6/LB
RJ7/UB
Legend:
PORTJ
LATJ
TRISJ
PORTG
Legend: Shaded cells are not used by PORTJ.
Pin Name
Name
direction or is overridden for this option).
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, x = Don’t care (TRIS bit does not affect port
TRISJ7
LATJ7
RDPU
Function
Bit 7
RJ7
WRH
WRL
RJ0
ALE
RJ1
RJ2
RJ3
RJ4
BA0
RJ5
RJ6
RJ7
OE
CE
UB
LB
TRISJ6
LATJ6
REPU
Bit 6
Setting
RJ6
TRIS
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
TRISJ5
LATJ5
RJPU
Bit 5
I/O
RJ5
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
TRISJ4
LATJ4
Bit 4
RG4
RJ4
LATJ<0> data output.
PORTJ<0> data input.
External memory interface address latch enable control output; takes
priority over digital I/O.
LATJ<1> data output.
PORTJ<1> data input.
External memory interface output enable control output; takes priority
over digital I/O.
LATJ<2> data output.
PORTJ<2> data input.
External memory bus write low byte control; takes priority over
digital I/O.
LATJ<3> data output.
PORTJ<3> data input.
External memory interface write high byte control output; takes priority
over digital I/O.
LATJ<4> data output.
PORTJ<4> data input.
External memory interface byte address 0 control output; takes priority
over digital I/O.
LATJ<5> data output.
PORTJ<5> data input.
External memory interface chip enable control output; takes priority
over digital I/O.
LATJ<6> data output.
PORTJ<6> data input.
External memory interface lower byte enable control output; takes
priority over digital I/O.
LATJ<7> data output.
PORTJ<7> data input.
External memory interface upper byte enable control output; takes
priority over digital I/O.
TRISJ3
LATJ3
PIC18F85J11 FAMILY
Bit 3
RG3
RJ3
TRISJ2
LATJ2
Bit 2
RG2
RJ2
Description
TRISJ1
LATJ1
Bit 1
RG1
RJ1
TRISJ0
LATJ0
Bit 0
RG0
RJ0
DS39774D-page 149
on page
Values
Reset
60
60
60
60