PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 138

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

PIC18F85J11 FAMILY
TABLE 11-9:
DS39774D-page 138
RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RD4/AD4/PSP4
RD5/AD5/PSP5
RD6/AD6/PSP6
Legend:
Note 1:
Pin Name
2:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit
does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PSP I/O.
Available on 80-pin devices only.
Function
PORTD FUNCTIONS
AD0
AD1
AD2
AD3
AD4
AD5
AD6
PSP0
PSP1
PSP2
PSP3
PSP4
PSP5
PSP6
RD0
RD1
RD2
RD3
RD4
RD5
RD6
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Setting
TRIS
0
1
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
DIG-3
Type
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
TTL
DIG
TTL
I/O
ST
ST
ST
ST
ST
ST
ST
LATD<0> data output.
PORTD<0> data input.
External memory interface, address/data bit 0 output.
External memory interface, data bit 0 input.
PSP read output data (LATD<0>); takes priority over port data.
PSP write data input.
LATD<1> data output.
PORTD<1> data input.
External memory interface, address/data bit 1 output.
External memory interface, data bit 1 input.
PSP read output data (LATD<1>); takes priority over port data.
PSP write data input.
LATD<2> data output.
PORTD<2> data input.
External memory interface, address/data bit 2 output.
External memory interface, data bit 2 input.
PSP read output data (LATD<2>); takes priority over port data.
PSP write data input.
LATD<3> data output.
PORTD<3> data input.
External memory interface, address/data bit 3 output.
External memory interface, data bit 3 input.
PSP read output data (LATD<3>); takes priority over port data.
PSP write data input.
LATD<4> data output.
PORTD<4> data input.
External memory interface, address/data bit 4 output.
External memory interface, data bit 4 input.
PSP read output data (LATD<4>); takes priority over port data.
PSP write data input.
LATD<5> data output.
PORTD<5> data input.
External memory interface, address/data bit 5 output.
External memory interface, data bit 5 input.
PSP read output data (LATD<5>); takes priority over port data.
PSP write data input.
LATD<6> data output.
PORTD<6> data input.
External memory interface, address/data bit 6 output.
External memory interface, data bit 6 input.
PSP read output data (LATD<6>); takes priority over port data.
PSP write data input.
Description
 2010 Microchip Technology Inc.
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