PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 234

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

PIC18F85J11 FAMILY
FIGURE 18-4:
FIGURE 18-5:
TABLE 18-5:
DS39774D-page 234
INTCON
PIR1
PIE1
IPR1
RCSTA1
TXREG1
TXSTA1
BAUDCON1
SPBRGH1
SPBRG1
LATG
Legend: — = unimplemented locations read as ‘0’. Shaded cells are not used for asynchronous transmission.
Note:
(Interrupt Reg. Flag)
Reg. Empty Flag)
Reg. Empty Flag)
Write to TXREG1
Reg. Empty Flag)
Write to TXREG1
(Transmit Buffer
Name
(Transmit Shift
(Transmit Shift
BRG Output
(Shift Clock)
BRG Output
(Shift Clock)
This timing diagram shows two consecutive transmissions.
TX1 (pin)
TRMT bit
TX1IF bit
TX1 (pin)
TX1IF bit
TRMT bit
EUSART Transmit Register
EUSART Baud Rate Generator Register High Byte
EUSART Baud Rate Generator Register Low Byte
GIE/GIEH PEIE/GIEL TMR0IE
ABDOVF
PSPIF
PSPIE
PSPIP
CSRC
SPEN
U2OD
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS TRANSMISSION
1 T
ASYNCHRONOUS TRANSMISSION
ASYNCHRONOUS TRANSMISSION (BACK-TO-BACK)
CY
Word 1
Transmit Shift Reg
Word 1
Transmit Shift Reg.
Word 1
Word 1
RCIDL
U1OD
ADIE
ADIP
Bit 6
ADIF
RX9
TX9
1 T
CY
Start bit
Start bit
Word 2
RXDTP
RC1IE
RC1IP
RC1IF
SREN
TXEN
Bit 5
—
1 T
CY
bit 0
bit 0
TXCKP
INT0IE
LATG4
TX1IF
TX1IE
TX1IP
CREN
SYNC
Bit 4
bit 1
Word 1
bit 1
Word 1
ADDEN
SENDB
BRG16
LATG3
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
TMR0IF
LATG2
BRGH
FERR
Bit 2
—
—
—
—
bit 7/8
bit 7/8
Word 2
Transmit Shift Reg.
TMR2IE
TMR2IP
TMR2IF
Stop bit
LATG1
INT0IF
OERR
TRMT
 2010 Microchip Technology Inc.
WUE
Bit 1
Stop bit
Start bit
TMR1IE
TMR1IP
TMR1IF
ABDEN
LATG0
RX9D
TX9D
RBIF
Bit 0
Word 2
on page
Values
bit 0
Reset
57
59
59
59
59
59
59
60
60
60
59