HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 149

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Register Description—Intel
3.8.11.9
Note:
July 2009
Order Number: 318378-005US
PEXSLOTCAP[7:2,0] - PCI Express* Slot Capabilities Register
The Slot Capabilities register identifies the PCI Express* specific slot capabilities.
The ESI port, device 0, does not support PCI Hot Plug* capabilities.
Device:
Function:
Offset:
31:19
18:17
16:15
14:7
6:0
Bit
6
5
4
3
2
RWO
RWO
RWO
RWO
RWO
RWO
RWO
®
Attr
RO
RV
RV
5100 MCH Chipset
7-2, 0
0
80h
Default
00h
0h
0h
0h
0h
0h
0h
0h
0h
0h
PSN: Physical Slot Number
This field indicates the physical slot number connected to the PCI Express*
port. It should be initialized to 0 for ports connected to devices that are either
integrated on the system board or integrated within the same silicon such as
the Root port in the Intel
Reserved
SPLS: Slot Power Limit Scale
This field specifies the scale used for the Slot Power Limit Value.
Range of Values:
00: 1.0x
01: 0.1x
10: 0.01x
11: 0.001x
SPLV: Slot Power Limit Value
This field specifies the upper limit on power supplied by
slot in conjunction with the Slot Power Limit Scale value defined previously
Power limit (in watts) = SPLS x SPLV
Reserved
HPC: PCI Hot Plug* Capable
This field defines PCI Hot Plug* support capabilities for the PCI Express* port
0: indicates that this slot is not capable of supporting PCI Hot Plug*
operations.
1: indicates that this slot is capable of supporting PCI Hot Plug* operations
HPS: PCI Hot Plug* Surprise
This field indicates that a device in this slot may be removed from the system
without prior notification.
0: Indicates that PCI Hot Plug* surprise is not supported
1: Indicates that PCI Hot Plug* surprise is supported
PIP: Power Indicator Present
This bit indicates that a Power Indicator is implemented on the chassis for this
slot.
0: Indicates that Power Indicator is not present
1: Indicates that Power Indicator is present
AIP: Attention Indicator Present
This bit indicates that an Attention Indicator is implemented on the chassis for
this slot.
0: Indicates that an Attention Indicator is not present
1: Indicates that an Attention Indicator is present
MRLSP: MRL Sensor Present
This bit indicates that an MRL Sensor is implemented on the chassis for this
slot.
0: Indicates that an MRL Sensor is not present
1: Indicates that an MRL Sensor is present
®
5100 MCH Chipset.
Description
Intel
®
5100 Memory Controller Hub Chipset
Datasheet
149