HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 404

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Table 143.
Intel
Datasheet
404
Ball No.
K25
K26
K27
K28
K29
K30
K31
K32
K33
K34
K35
K36
K37
K38
L10
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
L26
L27
L28
L29
L30
L31
L1
L2
L3
L4
L5
L6
L7
L8
L9
®
5100 Memory Controller Hub Chipset
CH0_A[15]/CH0_ODT[4]
CH1_DQSN[11]
CH1_DQSP[11]
SPD0SMBDATA
CH1_CRESRET
CH0_DQSN[8]
CH0_DQSP[8]
CH0_DQSN[4]
Signal Name
Intel
CH1_CS[2]#
CH0_DQ[36]
CH0_DQ[37]
CH0_DQ[38]
CH0_DQ[27]
CH1_DQ[16]
CH1_CS[1]#
CFGSMBCLK
CH1_CRES1
CH0_CB[7]
CH0_CB[2]
CH0_CB[3]
CH1_BA[0]
CH1_WE#
CH0_A[8]
CH0_A[7]
PE6RN[3]
PE6TN[2]
CH0_A[9]
PE7TP[3]
PE7TP[2]
ERR[1]#
PEVSSA
VCCPE
VCCPE
VCCPE
VCCPE
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VCC
VCC
VSS
®
5100 Memory Controller Hub Chipset Signals By Ball (Sheet 5 of 16)
Buffer Type Direction Ball No.
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Analog
CMOS
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
SMB
SMB
PEX
PEX
PEX
PEX
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
Intel
M10
M11
M12
M13
M14
M15
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M26
M27
M28
M29
M30
M31
M32
M33
M34
M35
M36
M37
M38
®
L32
L33
L34
L35
L36
L37
L38
M1
M2
M3
M4
M5
M6
M7
M8
M9
5100 MCH Chipset—Ballout and Package Information
CH0_DQSP[13]
Signal Name
CH0_DQSP[4]
GPIOSMBCLK
CH0_DQ[32]
CH1_DQ[44]
CH1_CS[3]#
CH0_DQ[33]
CH0_DQ[39]
CH0_DQ[35]
CH1_DQ[41]
CH1_CRES2
CH0_BA[2]
CH1_A[13]
CH1_RAS#
CH1_CAS#
CH1_BA[1]
PE7TN[3]
PE7TN[2]
PE5TN[1]
PE7RP[3]
PE7RP[2]
PE5TP[1]
VCCDDR
VCCDDR
VCCDDR
VCCPE
VCCPE
VCCPE
VSS
VSS
VSS
VSS
VSS
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Order Number: 318378-005US
Buffer Type Direction
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
Power/Other
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
SMB
PEX
PEX
PEX
PEX
PEX
PEX
July 2009
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
I
I
I