HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 417

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Ballout and Package Information—Intel
Table 144.
July 2009
Order Number: 318378-005US
Ball No.
AA27
AA28
W35
W32
W34
W36
U34
U38
U37
G16
H15
N34
H29
G23
D15
G17
R38
T35
V36
C14
Y36
V35
V33
Y35
Y31
Y27
C16
Y38
Y28
A16
E16
F15
A15
A23
F22
P37
V38
Y33
C23
K37
R36
Y30
K25
B15
J15
CH0_DQSN[13]
CH0_DQSN[10]
CH0_DQSN[11]
CH0_DQSN[12]
CH0_DQSN[14]
CH0_DQSN[15]
CH0_DQSN[16]
CH0_DQSN[17]
CH0_DQSP[10]
CH0_DQSN[0]
CH0_DQSN[1]
CH0_DQSN[2]
CH0_DQSN[3]
CH0_DQSN[4]
CH0_DQSN[5]
CH0_DQSN[6]
CH0_DQSN[7]
CH0_DQSN[8]
CH0_DQSN[9]
CH0_DQSP[0]
CH0_DQSP[1]
Signal Name
Intel
CH0_DQ[45]
CH0_DQ[46]
CH0_DQ[47]
CH0_DQ[48]
CH0_DQ[49]
CH0_DQ[50]
CH0_DQ[51]
CH0_DQ[52]
CH0_DQ[53]
CH0_DQ[54]
CH0_DQ[55]
CH0_DQ[56]
CH0_DQ[57]
CH0_DQ[58]
CH0_DQ[59]
CH0_DQ[60]
CH0_DQ[61]
CH0_DQ[62]
CH0_DQ[63]
CH0_DQ[5]
CH0_DQ[6]
CH0_DQ[7]
CH0_DQ[8]
CH0_DQ[9]
®
5100 Memory Controller Hub Chipset Signals By Name (Sheet 2 of 16)
Buffer Type Direction Ball No.
®
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
5100 MCH Chipset
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
W37
M34
H28
C22
G22
R35
K26
H26
C35
G28
C32
D36
D35
M29
G34
D38
D37
C37
C36
K31
M32
M31
R27
B23
F23
P36
V37
Y34
L37
Y29
E15
A34
E35
A35
A32
E38
F37
F35
B36
E36
F34
T27
J32
J31
J34
CH1_A[15]/CH1_ODT[4]
CH0_SLEWCRES
CH0_DQSP[11]
CH0_DQSP[12]
CH0_DQSP[13]
CH0_DQSP[14]
CH0_DQSP[15]
CH0_DQSP[16]
CH0_DQSP[17]
CH0_DRVCRES
Signal Name
CH0_DQSP[2]
CH0_DQSP[3]
CH0_DQSP[4]
CH0_DQSP[5]
CH0_DQSP[6]
CH0_DQSP[7]
CH0_DQSP[8]
CH0_DQSP[9]
CH0_ODT[0]
CH0_ODT[1]
CH0_ODT[2]
CH0_ODT[3]
CH1_BA[0]
CH1_BA[1]
CH1_BA[2]
CH1_CB[0]
CH1_CB[1]
CH0_RAS#
CH1_A[10]
CH1_A[11]
CH1_A[12]
CH1_A[13]
CH1_A[14]
CH1_CAS#
CH0_WE#
CH1_A[0]
CH1_A[1]
CH1_A[2]
CH1_A[3]
CH1_A[4]
CH1_A[5]
CH1_A[6]
CH1_A[7]
CH1_A[8]
CH1_A[9]
Intel
®
5100 Memory Controller Hub Chipset
Buffer Type Direction
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
DDR2
Datasheet
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
417