MC9S08AW32CFGE Freescale, MC9S08AW32CFGE Datasheet - Page 157

MC9S08AW32CFGE

Manufacturer Part Number
MC9S08AW32CFGE
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S08AW32CFGE

Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
34
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
32KB
Lead Free Status / RoHS Status
Compliant

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Chapter 9
Keyboard Interrupt (S08KBIV1)
9.1
The MC9S08AW60 Series has one KBI module with eight keyboard interrupt inputs that are shared with
port D and port G pins. See
hardware aspects of these pins.
9.2
The KBI input KBIP7 shares a common pin with PTD7 and AD15. When KBIP7 is enabled the pin is
forced to its input state regardless of the value of the associated port D data direction bit. The port D pullup
enable is still used to control the pullup resistor and the pin state can be sensed through a read of the port
D data register (this requires that bit 7 of the port D DDR is 0). In the case that the pin is enabled as an
ADC input, both the PTD7 and KBIP7 functions are disabled, including the pullup resistor.
The KBI input KBIP6 shares a common pin with PTD3 and AD11, and KBI input KBIP5 shares a common
pin with PTD2 and AD10. The sharing of each of these inputs with port and ADC functions operates in
the same way as described above for KBIP7.
The KBI inputs KBIP4 – KBIP0 are shared on common pins with PTG4 – PTG0. These pins all operate
in the same way as described above for KBIP7 except that none are shared with an ADC input.
KBIP3 – KBIP0 are always falling-edge/low-level sensitive. KBIP7 – KBIP4 can be configured for
rising-edge/high-level or for falling-edge/low-level sensitivity. When any of the inputs KBIP7 – KBIP0 are
enabled and configured to detect rising edges/high levels, and the pin pullup is enabled through the
corresponding port pullup enable bit for that pin, a pulldown resistor rather than a pullup resistor is enabled
on the pin.
Freescale Semiconductor
1
x = Don’t care
(Pull Enable)
PTxPEn
0
1
x
1
1
0
Introduction
Keyboard Pin Sharing
(Data Direction)
PTxDDn
0
0
1
x
x
x
Chapter 2, “Pins and
Table 9-1. KBI and Parallel I/O Interaction
(KBI Pin Enable)
KBIPEn
MC9S08AW60 Data Sheet, Rev 2
0
0
0
1
1
1
Connections,” for more information about the logic and
(KBI Edge Select)
KBEDGn
x
x
x
0
1
x
1
disabled
disabled
disabled
disabled
enabled
enabled
Pullup
Pulldown
disabled
disabled
disabled
disabled
disabled
enabled
157

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