PSB21373HV1.1XT Infineon Technologies, PSB21373HV1.1XT Datasheet - Page 188

• Manufacturer Part Number: PSB21373HV1.1XT
• Manufacturer: Infineon Technologies

Specifications of PSB21373HV1.1XT

• Lead Free Status / RoHS Status: Compliant

7.2.5
Value after reset: 00
TR_
CMD
Normally the signals in this register are generated by the layer 1 state machine. If the
internal layer 1 state machine is disabled (bit L1SW in TR_CONF = ’1’) this register can
be written by the microcontroller.
XINF
000: Transmit INFO 0
001: Transmit INFO 1W
010: Transmit INFO 1
011: Transmit INFO 3
100: Send continous 192 kHz pulses (Test Mode 2)
101: Send single 4 kHz pulses (Test Mode 1)
11x: reserved
PD
0: Transceiver in operational mode
1: Transceiver in power down mode. From the analog part only the level detector is
LP_A
The setting of this bit corresponds to the C/I command ARL.
0: Analog loop is open
1: Analog loop is closed
Data Sheet
active. Additionally no clocks are provided and the complete digital part of the
transceiver is inactive if the CFS bit (see chapter 7.2.10) is set to ’1’.
TR_CMD - Transceiver Command Register
7
... Transmit INFO
... Power Down
... Loop Analog
XINF
H
0
188
0
PD
LP_A
0
0
RD/WR (34
PSB 21373
2002-05-13
H
)