PSB21373HV1.1XT Infineon Technologies, PSB21373HV1.1XT Datasheet - Page 94

• Manufacturer Part Number: PSB21373HV1.1XT
• Manufacturer: Infineon Technologies

Specifications of PSB21373HV1.1XT

• Lead Free Status / RoHS Status: Compliant

The HDLC controller indicates to the host that a new data block can be read from the
RFIFO by means of an RPF interrupt (see previous chapter). User data is stored in the
RFIFO and information about the received frame is available in the RSTA, RBCL and
RBCH registers which are listed in table 8.
Table 8
Receive Information at RME Interrupt
Information
Type of frame
(Command/
Response)
Recognition of SAPI
Recognition of TEI
Result of CRC check
(correct/incorrect)
Valid Frame
Abort condition detected
(yes/no)
Data overflow during reception
of a frame (yes/no)
Number of bytes received in
RFIFO
Message length
RFIFO Overflow
Data Sheet
Location
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RFIFO
(last byte)
RBCL Reg. RBC4-0
RBCL Reg.
RBCH Reg.
RBCH Reg. OV
94
Bit
C/R
SA1, 0
TA
CRC
VFR
RAB
RDO
RBC11-0 All
Mode
Non-auto mode,
2-byte address field
Transparent mode 1
Non-auto mode,
2-byte address field
Transparent mode 1
All except
transparent mode 0
All
All
All
All
All
All
PSB 21373
2002-05-13